Merge remote-tracking branch 'kvmarm/misc-5.5' into kvmarm/next (cd7056ae) · Commits · 戴 / test

arch/arm/include/asm/kvm_emulate.h

+2 −2

Original line number	Diff line number	Diff line
		@@ -95,12 +95,12 @@ static inline unsigned long vcpu_hcr(const struct kvm_vcpu vcpu)
		return (unsigned long *)&vcpu->arch.hcr;
		}

		static inline void vcpu_clear_wfe_traps(struct kvm_vcpu *vcpu)
		static inline void vcpu_clear_wfx_traps(struct kvm_vcpu *vcpu)
		{
		vcpu->arch.hcr &= ~HCR_TWE;
		}

		static inline void vcpu_set_wfe_traps(struct kvm_vcpu *vcpu)
		static inline void vcpu_set_wfx_traps(struct kvm_vcpu *vcpu)
		{
		vcpu->arch.hcr \|= HCR_TWE;
		}

+4 −0

Original line number	Diff line number	Diff line
		@@ -21,6 +21,10 @@
		#define VCPU_STAT(x) { #x, offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU }

		struct kvm_stats_debugfs_item debugfs_entries[] = {
		VCPU_STAT(halt_successful_poll),
		VCPU_STAT(halt_attempted_poll),
		VCPU_STAT(halt_poll_invalid),
		VCPU_STAT(halt_wakeup),
		VCPU_STAT(hvc_exit_stat),
		VCPU_STAT(wfe_exit_stat),
		VCPU_STAT(wfi_exit_stat),

+1 −2

Original line number	Diff line number	Diff line
		@@ -61,7 +61,6 @@
		* RW: 64bit by default, can be overridden for 32bit VMs
		* TAC: Trap ACTLR
		* TSC: Trap SMC
		* TVM: Trap VM ops (until M+C set in SCTLR_EL1)
		* TSW: Trap cache operations by set/way
		* TWE: Trap WFE
		* TWI: Trap WFI
		@@ -74,7 +73,7 @@
		* SWIO: Turn set/way invalidates into set/way clean+invalidate
		*/
		#define HCR_GUEST_FLAGS (HCR_TSC \| HCR_TSW \| HCR_TWE \| HCR_TWI \| HCR_VM \| \
		HCR_TVM \| HCR_BSU_IS \| HCR_FB \| HCR_TAC \| \
		HCR_BSU_IS \| HCR_FB \| HCR_TAC \| \
		HCR_AMO \| HCR_SWIO \| HCR_TIDCP \| HCR_RW \| HCR_TLOR \| \
		HCR_FMO \| HCR_IMO)
		#define HCR_VIRT_EXCP_MASK (HCR_VSE \| HCR_VI \| HCR_VF)

+18 −3

Original line number	Diff line number	Diff line
		@@ -53,8 +53,18 @@ static inline void vcpu_reset_hcr(struct kvm_vcpu *vcpu)
		/* trap error record accesses */
		vcpu->arch.hcr_el2 \|= HCR_TERR;
		}
		if (cpus_have_const_cap(ARM64_HAS_STAGE2_FWB))

		if (cpus_have_const_cap(ARM64_HAS_STAGE2_FWB)) {
		vcpu->arch.hcr_el2 \|= HCR_FWB;
		} else {
		/*
		* For non-FWB CPUs, we trap VM ops (HCR_EL2.TVM) until M+C
		* get set in SCTLR_EL1 such that we can detect when the guest
		* MMU gets turned on and do the necessary cache maintenance
		* then.
		*/
		vcpu->arch.hcr_el2 \|= HCR_TVM;
		}

		if (test_bit(KVM_ARM_VCPU_EL1_32BIT, vcpu->arch.features))
		vcpu->arch.hcr_el2 &= ~HCR_RW;
		@@ -77,14 +87,19 @@ static inline unsigned long vcpu_hcr(struct kvm_vcpu vcpu)
		return (unsigned long *)&vcpu->arch.hcr_el2;
		}

		static inline void vcpu_clear_wfe_traps(struct kvm_vcpu *vcpu)
		static inline void vcpu_clear_wfx_traps(struct kvm_vcpu *vcpu)
		{
		vcpu->arch.hcr_el2 &= ~HCR_TWE;
		if (atomic_read(&vcpu->arch.vgic_cpu.vgic_v3.its_vpe.vlpi_count))
		vcpu->arch.hcr_el2 &= ~HCR_TWI;
		else
		vcpu->arch.hcr_el2 \|= HCR_TWI;
		}

		static inline void vcpu_set_wfe_traps(struct kvm_vcpu *vcpu)
		static inline void vcpu_set_wfx_traps(struct kvm_vcpu *vcpu)
		{
		vcpu->arch.hcr_el2 \|= HCR_TWE;
		vcpu->arch.hcr_el2 \|= HCR_TWI;
		}

		static inline void vcpu_ptrauth_enable(struct kvm_vcpu *vcpu)

+4 −0

Original line number	Diff line number	Diff line
		@@ -34,6 +34,10 @@
		#define VCPU_STAT(x) { #x, offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU }

		struct kvm_stats_debugfs_item debugfs_entries[] = {
		VCPU_STAT(halt_successful_poll),
		VCPU_STAT(halt_attempted_poll),
		VCPU_STAT(halt_poll_invalid),
		VCPU_STAT(halt_wakeup),
		VCPU_STAT(hvc_exit_stat),
		VCPU_STAT(wfe_exit_stat),
		VCPU_STAT(wfi_exit_stat),