Commit cd29253f authored by Shaoyun Liu's avatar Shaoyun Liu Committed by Alex Deucher
Browse files

drm/amdgpu: Change SOC15_REG_OFFSET to use dynamic register offset 



Acked-by: default avatarChristian Konig <christian.koenig@amd.com>
Signed-off-by: default avatarShaoyun Liu <Shaoyun.Liu@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 946a4d5b

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

+4 −0
Original line number Diff line number Diff line
@@ -3585,6 +3585,8 @@ static void gfx_v9_0_ring_emit_hdp_flush(struct amdgpu_ring *ring) 


static void gfx_v9_0_ring_emit_hdp_invalidate(struct amdgpu_ring *ring)

{

	struct amdgpu_device *adev = ring->adev;



	gfx_v9_0_write_data_to_reg(ring, 0, true,

				   SOC15_REG_OFFSET(HDP, 0, mmHDP_READ_CACHE_INVALIDATE), 1);

}
@@ -3746,6 +3748,8 @@ static void gfx_v9_0_ring_set_wptr_compute(struct amdgpu_ring *ring) 
static void gfx_v9_0_ring_emit_fence_kiq(struct amdgpu_ring *ring, u64 addr,

					 u64 seq, unsigned int flags)

{

	struct amdgpu_device *adev = ring->adev;



	/* we only allocate 32bit for each seq wb address */

	BUG_ON(flags & AMDGPU_FENCE_FLAG_64BIT);

drivers/gpu/drm/amd/amdgpu/psp_v10_0.c

+5 −4
Original line number Diff line number Diff line
@@ -298,7 +298,8 @@ int psp_v10_0_cmd_submit(struct psp_context *psp, 
}



static int

psp_v10_0_sram_map(unsigned int *sram_offset, unsigned int *sram_addr_reg_offset,

psp_v10_0_sram_map(struct amdgpu_device *adev,

		unsigned int *sram_offset, unsigned int *sram_addr_reg_offset,

		unsigned int *sram_data_reg_offset,

		enum AMDGPU_UCODE_ID ucode_id)

{
@@ -395,7 +396,7 @@ bool psp_v10_0_compare_sram_data(struct psp_context *psp, 
	uint32_t *ucode_mem = NULL;

	struct amdgpu_device *adev = psp->adev;



	err = psp_v10_0_sram_map(&fw_sram_reg_val, &fw_sram_addr_reg_offset,

	err = psp_v10_0_sram_map(adev, &fw_sram_reg_val, &fw_sram_addr_reg_offset,

				&fw_sram_data_reg_offset, ucode_type);

	if (err)

		return false;

drivers/gpu/drm/amd/amdgpu/psp_v3_1.c

+5 −4
Original line number Diff line number Diff line
@@ -410,7 +410,8 @@ int psp_v3_1_cmd_submit(struct psp_context *psp, 
}



static int

psp_v3_1_sram_map(unsigned int *sram_offset, unsigned int *sram_addr_reg_offset,

psp_v3_1_sram_map(struct amdgpu_device *adev,

		unsigned int *sram_offset, unsigned int *sram_addr_reg_offset,

		unsigned int *sram_data_reg_offset,

		enum AMDGPU_UCODE_ID ucode_id)

{
@@ -507,7 +508,7 @@ bool psp_v3_1_compare_sram_data(struct psp_context *psp, 
	uint32_t *ucode_mem = NULL;

	struct amdgpu_device *adev = psp->adev;



	err = psp_v3_1_sram_map(&fw_sram_reg_val, &fw_sram_addr_reg_offset,

	err = psp_v3_1_sram_map(adev, &fw_sram_reg_val, &fw_sram_addr_reg_offset,

				&fw_sram_data_reg_offset, ucode_type);

	if (err)

		return false;

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

+2 −0
Original line number Diff line number Diff line
@@ -385,6 +385,8 @@ static void sdma_v4_0_ring_emit_hdp_flush(struct amdgpu_ring *ring) 


static void sdma_v4_0_ring_emit_hdp_invalidate(struct amdgpu_ring *ring)

{

	struct amdgpu_device *adev = ring->adev;



	amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_SRBM_WRITE) |

			  SDMA_PKT_SRBM_WRITE_HEADER_BYTE_EN(0xf));

	amdgpu_ring_write(ring, SOC15_REG_OFFSET(HDP, 0, mmHDP_READ_CACHE_INVALIDATE));

drivers/gpu/drm/amd/amdgpu/soc15.c

+2 −5
Original line number Diff line number Diff line
@@ -373,14 +373,11 @@ static uint32_t soc15_get_register_value(struct amdgpu_device *adev, 
	if (indexed) {

		return soc15_read_indexed_register(adev, se_num, sh_num, reg_offset);

	} else {

		switch (reg_offset) {

		case SOC15_REG_OFFSET(GC, 0, mmGB_ADDR_CONFIG):

		if (reg_offset == SOC15_REG_OFFSET(GC, 0, mmGB_ADDR_CONFIG))

			return adev->gfx.config.gb_addr_config;

		default:

		return RREG32(reg_offset);

	}

}

}



static int soc15_read_register(struct amdgpu_device *adev, u32 se_num,

			    u32 sh_num, u32 reg_offset, u32 *value)

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