Commit ccba0c68 authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'omap-for-v4.18/dt-signed' of... 

Merge tag 'omap-for-v4.18/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt

Device tree changes for omap variants for v4.18 merge window

This series adds support for am335x-pockebeagle and also add missing
pinctrl configuration for am335x evm and beagle bone variants.

There are also changes to add missing omap3 oscillator clocks for audio,
and fixes am437x tps65218 irq type used for various board specific
files.

There are also few minor fixes included that are not urgent. The
fixes for n8x0 audio also depend on driver changes, and the hp t410
mmc card detect mux typo is harmless.

* tag 'omap-for-v4.18/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap

:
  ARM: dts: correct invalid I/O definition for MMC/SD card detect on T410
  ARM: dts: omap2420-n810: Correct the audio codec (tlv320aic33) node
  ARM: dts: omap2420-n810: Enable McBSP2 for audio
  ARM: dts: am437x-sk-evm: Correct tps65218 irq type
  ARM: dts: am437x-epos-evm: Correct tps65218 irq type
  ARM: dts: am437x-cm-t43: Correct tps65218 irq type
  ARM: dts: am437x-gp-evm: Correct tps65218 irq type
  ARM: dts: Add am335x-pocketbeagle
  ARM: dts: am33xx: Add pinmux data for mmc1 in am335x-evm, evmsk and beaglebone
  ARM: dts: omap3-gta04: Add fixed 26MHz clock as fck for twl
  ARM: dts: omap3-pandora: Add fixed 26MHz clock as fck for twl
  ARM: dts: omap3-beagle-xm: Add fixed 26MHz clock as fck for twl
  ARM: dts: logicpd-som-lv: Enable Touchscreen controller

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents aa264238 8dfa7552

arch/arm/boot/dts/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -688,6 +688,7 @@ dtb-$(CONFIG_SOC_AM33XX) += \ 
	am335x-pdu001.dtb \

	am335x-pepper.dtb \

	am335x-phycore-rdk.dtb \

	am335x-pocketbeagle.dtb \

	am335x-shc.dtb \

	am335x-sbc-t335.dtb \

	am335x-sl50.dtb \

arch/arm/boot/dts/am335x-bone-common.dtsi

+8 −1
Original line number Diff line number Diff line
@@ -161,7 +161,14 @@ 


	mmc1_pins: pinmux_mmc1_pins {

		pinctrl-single,pins = <

			AM33XX_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* GPIO0_6 */

			AM33XX_IOPAD(0x960, PIN_INPUT | MUX_MODE7)		/* spio0_cs1.gpio0_6 */

			AM33XX_IOPAD(0x8fc, PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_dat0.mmc0_dat0 */

			AM33XX_IOPAD(0x8f8, PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_dat1.mmc0_dat1 */

			AM33XX_IOPAD(0x8f4, PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_dat2.mmc0_dat2 */

			AM33XX_IOPAD(0x8f0, PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_dat3.mmc0_dat3 */

			AM33XX_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_cmd.mmc0_cmd */

			AM33XX_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_clk.mmc0_clk */

			AM33XX_IOPAD(0x9a0, PIN_INPUT | MUX_MODE4)		/* mcasp0_aclkr.mmc0_sdwp */

		>;

	};

arch/arm/boot/dts/am335x-evm.dts

+8 −1
Original line number Diff line number Diff line
@@ -304,6 +304,13 @@ 
	mmc1_pins: pinmux_mmc1_pins {

		pinctrl-single,pins = <

			AM33XX_IOPAD(0x960, PIN_INPUT | MUX_MODE7)		/* spi0_cs1.gpio0_6 */

			AM33XX_IOPAD(0x8fc, PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_dat0.mmc0_dat0 */

			AM33XX_IOPAD(0x8f8, PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_dat1.mmc0_dat1 */

			AM33XX_IOPAD(0x8f4, PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_dat2.mmc0_dat2 */

			AM33XX_IOPAD(0x8f0, PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_dat3.mmc0_dat3 */

			AM33XX_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_cmd.mmc0_cmd */

			AM33XX_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_clk.mmc0_clk */

			AM33XX_IOPAD(0x9a0, PIN_INPUT | MUX_MODE4)		/* mcasp0_aclkr.mmc0_sdwp */

		>;

	};

arch/arm/boot/dts/am335x-evmsk.dts

+8 −1
Original line number Diff line number Diff line
@@ -400,6 +400,13 @@ 
	mmc1_pins: pinmux_mmc1_pins {

		pinctrl-single,pins = <

			AM33XX_IOPAD(0x960, PIN_INPUT | MUX_MODE7) 		/* spi0_cs1.gpio0_6 */

			AM33XX_IOPAD(0x8fc, PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_dat0.mmc0_dat0 */

			AM33XX_IOPAD(0x8f8, PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_dat1.mmc0_dat1 */

			AM33XX_IOPAD(0x8f4, PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_dat2.mmc0_dat2 */

			AM33XX_IOPAD(0x8f0, PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_dat3.mmc0_dat3 */

			AM33XX_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_cmd.mmc0_cmd */

			AM33XX_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_clk.mmc0_clk */

			AM33XX_IOPAD(0x9a0, PIN_INPUT | MUX_MODE4)		/* mcasp0_aclkr.mmc0_sdwp */

		>;

	};

arch/arm/boot/dts/am335x-osd335x-common.dtsi

0 → 100644
+124 −0
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// SPDX-License-Identifier: GPL-2.0

/*

 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/

 *

 * Author: Robert Nelson <robertcnelson@gmail.com>

 */



/ {

	cpus {

		cpu@0 {

			cpu0-supply = <&dcdc2_reg>;

		};

	};



	memory@80000000 {

		device_type = "memory";

		reg = <0x80000000 0x20000000>; /* 512 MB */

	};

};



&cpu0_opp_table {

	/*

	* Octavo Systems:

	* The EFUSE_SMA register is not programmed for any of the AM335x wafers

	* we get and we are not programming them during our production test.

	* Therefore, from a DEVICE_ID revision point of view, the silicon looks

	* like it is Revision 2.1.  However, from an EFUSE_SMA point of view for

	* the HW OPP table, the silicon looks like it is Revision 1.0 (ie the

	* EFUSE_SMA register reads as all zeros).

	*/

	oppnitro-1000000000 {

		opp-supported-hw = <0x06 0x0100>;

	};

};



&am33xx_pinmux {

	i2c0_pins: pinmux-i2c0-pins {

		pinctrl-single,pins = <

			AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0)	/* (C17) I2C0_SDA.I2C0_SDA */

			AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0)	/* (C16) I2C0_SCL.I2C0_SCL */

		>;

	};

};



&i2c0 {

	pinctrl-names = "default";

	pinctrl-0 = <&i2c0_pins>;



	status = "okay";

	clock-frequency = <400000>;



	tps: tps@24 {

		reg = <0x24>;

	};

};



/include/ "tps65217.dtsi"



&tps {

	interrupts = <7>; /* NMI */

	interrupt-parent = <&intc>;



	ti,pmic-shutdown-controller;



	pwrbutton {

		interrupts = <2>;

		status = "okay";

	};



	regulators {

		dcdc1_reg: regulator@0 {

			regulator-name = "vdds_dpr";

			regulator-always-on;

		};



		dcdc2_reg: regulator@1 {

			/* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */

			regulator-name = "vdd_mpu";

			regulator-min-microvolt = <925000>;

			regulator-max-microvolt = <1351500>;

			regulator-boot-on;

			regulator-always-on;

		};



		dcdc3_reg: regulator@2 {

			/* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */

			regulator-name = "vdd_core";

			regulator-min-microvolt = <925000>;

			regulator-max-microvolt = <1150000>;

			regulator-boot-on;

			regulator-always-on;

		};



		ldo1_reg: regulator@3 {

			regulator-name = "vio,vrtc,vdds";

			regulator-always-on;

		};



		ldo2_reg: regulator@4 {

			regulator-name = "vdd_3v3aux";

			regulator-always-on;

		};



		ldo3_reg: regulator@5 {

			regulator-name = "vdd_1v8";

			regulator-min-microvolt = <1800000>;

			regulator-max-microvolt = <1800000>;

			regulator-always-on;

		};



		ldo4_reg: regulator@6 {

			regulator-name = "vdd_3v3a";

			regulator-always-on;

		};

	};

};



&aes {

	status = "okay";

};



&sham {

	status = "okay";

};

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