Commit cc324d1a authored by David S. Miller's avatar David S. Miller
Browse files

Merge branch 'sparc64-16gb-hugepages' 



Nitin Gupta says:

====================
sparc64: Add 16GB hugepage support

SPARC architecture supports 16G hugepages but the kernel did not
support these. This patch series adds support for it and also cleanes
up some page walk/alloc functions.

Patch 1/3: Core changes needed to add 16G hugepage support: To map a
  single 16G hugepage, two PUD entries are used. Each PUD entry maps
  8G portion of a 16G page. This page table encoding scheme is same as
  that used for hugepages at PMD level (8M, 256M and 2G pages) where
  each PMD entry points successively to 8M regions within a page.  No
  page table entries below the PUD level are allocated for 16G
  hugepage since those are not required.

  TSB entries for a 16G page are created at every 4M boundary since
  the HUGE_TSB is used for these pages which is configured with page
  size of 4M.  When walking page tables (on a TSB miss), bits [32:22]
  are transferred from vaddr to PUD to resolve addresses at 4M
  boundary. The resolved address mapping is then stored in HUGE_TSB.

Patch 2/3: get_user_pages() etc. are used for direct IO. These
  functions were not aware of hugepages at the PUD level and would try
  to continue walking page tables beyond the PUD level. Since 16G
  hugepages have page tables allocated till PUD level only, these
  accesses would result in invalid access. This patch adds the case
  for PUD huge pages to these functions.

Patch 3/3: Patch 1 added the case of PUD entry being huge in page
  table walk and alloc functions. This new case further increased
  nesting in these functions and made them harder to follow. This
  patch flattens these functions for better readability.

Cc: sparclinux@vger.kernel.org

Chagenlog v6 vs v5:
 - Move include of hvcalls.S after the trap table to avoid
   overflowing previous space (Anthony)
Changelog v5 vs v4:
 - Checking at PUD level for hugepage entry during page table walk is
    patched out if 16GB hugepages are not being used.
	Changelog v4 vs v3:
 - Added cover letter (patch 0/4) for patch series.

Changelog v3 vs v2:
 - Fixed email headers so the subject shows up correctly.

Changelog v2 vs v1:
 - Remove redundant brgez,pn (Bob Picco)
 - Remove unncessary label rename from 700 to 701 (Rob Gardner)
 - Add patch description (Paul)
 - Add 16G case to get_user_pages()
====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents 91752a9c 4dbe87d5

arch/sparc/include/asm/hugetlb.h

+7 −0
Original line number Diff line number Diff line
@@ -4,6 +4,13 @@ 
#include <asm/page.h>

#include <asm-generic/hugetlb.h>



#ifdef CONFIG_HUGETLB_PAGE

struct pud_huge_patch_entry {

	unsigned int addr;

	unsigned int insn;

};

extern struct pud_huge_patch_entry __pud_huge_patch, __pud_huge_patch_end;

#endif



void set_huge_pte_at(struct mm_struct *mm, unsigned long addr,

		     pte_t *ptep, pte_t pte);

arch/sparc/include/asm/page_64.h

+2 −1
Original line number Diff line number Diff line
@@ -17,6 +17,7 @@ 


#define HPAGE_SHIFT		23

#define REAL_HPAGE_SHIFT	22

#define HPAGE_16GB_SHIFT	34

#define HPAGE_2GB_SHIFT		31

#define HPAGE_256MB_SHIFT	28

#define HPAGE_64K_SHIFT		16
@@ -28,7 +29,7 @@ 
#define HUGETLB_PAGE_ORDER	(HPAGE_SHIFT - PAGE_SHIFT)

#define HAVE_ARCH_HUGETLB_UNMAPPED_AREA

#define REAL_HPAGE_PER_HPAGE	(_AC(1,UL) << (HPAGE_SHIFT - REAL_HPAGE_SHIFT))

#define HUGE_MAX_HSTATE		4

#define HUGE_MAX_HSTATE		5

#endif



#ifndef __ASSEMBLY__

arch/sparc/include/asm/pgtable_64.h

+18 −2
Original line number Diff line number Diff line
@@ -414,6 +414,11 @@ static inline bool is_hugetlb_pmd(pmd_t pmd) 
	return !!(pmd_val(pmd) & _PAGE_PMD_HUGE);

}



static inline bool is_hugetlb_pud(pud_t pud)

{

	return !!(pud_val(pud) & _PAGE_PUD_HUGE);

}



#ifdef CONFIG_TRANSPARENT_HUGEPAGE

static inline pmd_t pmd_mkhuge(pmd_t pmd)

{
@@ -687,6 +692,8 @@ static inline unsigned long pmd_write(pmd_t pmd) 
	return pte_write(pte);

}



#define pud_write(pud)	pte_write(__pte(pud_val(pud)))



#ifdef CONFIG_TRANSPARENT_HUGEPAGE

static inline unsigned long pmd_dirty(pmd_t pmd)

{
@@ -823,9 +830,18 @@ static inline unsigned long __pmd_page(pmd_t pmd) 


	return ((unsigned long) __va(pfn << PAGE_SHIFT));

}



static inline unsigned long pud_page_vaddr(pud_t pud)

{

	pte_t pte = __pte(pud_val(pud));

	unsigned long pfn;



	pfn = pte_pfn(pte);



	return ((unsigned long) __va(pfn << PAGE_SHIFT));

}



#define pmd_page(pmd) 			virt_to_page((void *)__pmd_page(pmd))

#define pud_page_vaddr(pud)		\

	((unsigned long) __va(pud_val(pud)))

#define pud_page(pud) 			virt_to_page((void *)pud_page_vaddr(pud))

#define pmd_clear(pmdp)			(pmd_val(*(pmdp)) = 0UL)

#define pud_present(pud)		(pud_val(pud) != 0U)

arch/sparc/include/asm/tsb.h

+36 −0
Original line number Diff line number Diff line
@@ -195,6 +195,41 @@ extern struct tsb_phys_patch_entry __tsb_phys_patch, __tsb_phys_patch_end; 
	 nop; \

699:



	/* PUD has been loaded into REG1, interpret the value, seeing

	 * if it is a HUGE PUD or a normal one.  If it is not valid

	 * then jump to FAIL_LABEL.  If it is a HUGE PUD, and it

	 * translates to a valid PTE, branch to PTE_LABEL.

	 *

	 * We have to propagate bits [32:22] from the virtual address

	 * to resolve at 4M granularity.

	 */

#if defined(CONFIG_HUGETLB_PAGE) || defined(CONFIG_TRANSPARENT_HUGEPAGE)

#define USER_PGTABLE_CHECK_PUD_HUGE(VADDR, REG1, REG2, FAIL_LABEL, PTE_LABEL) \

700:	ba 700f;					\

	 nop;						\

	.section	.pud_huge_patch, "ax";		\

	.word		700b;				\

	nop;						\

	.previous;					\

	brz,pn		REG1, FAIL_LABEL;		\

	 sethi		%uhi(_PAGE_PUD_HUGE), REG2;	\

	sllx		REG2, 32, REG2;			\

	andcc		REG1, REG2, %g0;		\

	be,pt		%xcc, 700f;			\

	 sethi		%hi(0x1ffc0000), REG2;		\

	sllx		REG2, 1, REG2;			\

	brgez,pn	REG1, FAIL_LABEL;		\

	 andn		REG1, REG2, REG1;		\

	and		VADDR, REG2, REG2;		\

	brlz,pt		REG1, PTE_LABEL;		\

	 or		REG1, REG2, REG1;		\

700:

#else

#define USER_PGTABLE_CHECK_PUD_HUGE(VADDR, REG1, REG2, FAIL_LABEL, PTE_LABEL) \

	brz,pn		REG1, FAIL_LABEL; \

	 nop;

#endif



	/* PMD has been loaded into REG1, interpret the value, seeing

	 * if it is a HUGE PMD or a normal one.  If it is not valid

	 * then jump to FAIL_LABEL.  If it is a HUGE PMD, and it
@@ -242,6 +277,7 @@ extern struct tsb_phys_patch_entry __tsb_phys_patch, __tsb_phys_patch_end; 
	srlx		REG2, 64 - PAGE_SHIFT, REG2; \

	andn		REG2, 0x7, REG2; \

	ldxa		[REG1 + REG2] ASI_PHYS_USE_EC, REG1; \

	USER_PGTABLE_CHECK_PUD_HUGE(VADDR, REG1, REG2, FAIL_LABEL, 800f) \

	brz,pn		REG1, FAIL_LABEL; \

	 sllx		VADDR, 64 - (PMD_SHIFT + PMD_BITS), REG2; \

	srlx		REG2, 64 - PAGE_SHIFT, REG2; \

arch/sparc/kernel/head_64.S

+1 −1
Original line number Diff line number Diff line
@@ -893,7 +893,6 @@ sparc64_boot_end: 
#include "misctrap.S"

#include "syscalls.S"

#include "helpers.S"

#include "hvcalls.S"

#include "sun4v_tlb_miss.S"

#include "sun4v_ivec.S"

#include "ktlb.S"
@@ -938,6 +937,7 @@ swapper_4m_tsb: 


! 0x0000000000428000



#include "hvcalls.S"

#include "systbls_64.S"



	.data

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