Commit cbafcad0 authored by Miquel Raynal's avatar Miquel Raynal Committed by Gregory CLEMENT
Browse files

arm64: dts: marvell: Add support for AP807/AP807-quad



Describe AP807 and AP807-quad support.

Signed-off-by: default avatarMiquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: default avatarGregory CLEMENT <gregory.clement@bootlin.com>
parent 6a380172
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Device Tree file for Marvell Armada AP807 Quad
 *
 * Copyright (C) 2019 Marvell Technology Group Ltd.
 */

#include "armada-ap807.dtsi"

/ {
	model = "Marvell Armada AP807 Quad";
	compatible = "marvell,armada-ap807-quad", "marvell,armada-ap807";

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu0: cpu@0 {
			device_type = "cpu";
			compatible = "arm,cortex-a72", "arm,armv8";
			reg = <0x000>;
			enable-method = "psci";
			#cooling-cells = <2>;
			clocks = <&cpu_clk 0>;
		};
		cpu1: cpu@1 {
			device_type = "cpu";
			compatible = "arm,cortex-a72", "arm,armv8";
			reg = <0x001>;
			enable-method = "psci";
			#cooling-cells = <2>;
			clocks = <&cpu_clk 0>;
		};
		cpu2: cpu@100 {
			device_type = "cpu";
			compatible = "arm,cortex-a72", "arm,armv8";
			reg = <0x100>;
			enable-method = "psci";
			#cooling-cells = <2>;
			clocks = <&cpu_clk 1>;
		};
		cpu3: cpu@101 {
			device_type = "cpu";
			compatible = "arm,cortex-a72", "arm,armv8";
			reg = <0x101>;
			enable-method = "psci";
			#cooling-cells = <2>;
			clocks = <&cpu_clk 1>;
		};
	};
};
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Device Tree file for Marvell Armada AP807
 *
 * Copyright (C) 2019 Marvell Technology Group Ltd.
 */

#define AP_NAME		ap807
#include "armada-ap80x.dtsi"

/ {
	model = "Marvell Armada AP807";
	compatible = "marvell,armada-ap807";
};

&ap_syscon0 {
	ap_clk: clock {
		compatible = "marvell,ap807-clock";
		#clock-cells = <1>;
	};
};

&ap_syscon1 {
	cpu_clk: clock-cpu {
		compatible = "marvell,ap807-cpu-clock";
		clocks = <&ap_clk 0>, <&ap_clk 1>;
		#clock-cells = <1>;
	};
};