Merge remote-tracking branches 'asoc/topic/rx51', 'asoc/topic/samsung',...

  "iis" is the i2s bus clock and i2s_opclk0, i2s_opclk1 are sources of the root

  "iis" is the i2s bus clock and i2s_opclk0, i2s_opclk1 are sources of the root

  clk. i2s0 has internal mux to select the source of root clk and i2s1 and i2s2

  clk. i2s0 has internal mux to select the source of root clk and i2s1 and i2s2

  doesn't have any such mux.

  doesn't have any such mux.

- #clock-cells: should be 1, this property must be present if the I2S device

  is a clock provider in terms of the common clock bindings, described in

  ../clock/clock-bindings.txt.

- clock-output-names: from the common clock bindings, names of the CDCLK

  I2S output clocks, suggested values are "i2s_cdclk0", "i2s_cdclk1",

  "i2s_cdclk3" for the I2S0, I2S1, I2S2 devices recpectively.

There are following clocks available at the I2S device nodes:

 CLK_I2S_CDCLK    - the CDCLK (CODECLKO) gate clock,

 CLK_I2S_RCLK_PSR - the RCLK prescaler divider clock (corresponding to the

		    IISPSR register),

 CLK_I2S_RCLK_SRC - the RCLKSRC mux clock (corresponding to RCLKSRC bit in

		    IISMOD register).

Refer to the SoC datasheet for availability of the above clocks.

The CLK_I2S_RCLK_PSR and CLK_I2S_RCLK_SRC clocks are usually only available

in the IIS Multi Audio Interface (I2S0).

Note: Old DTs may not have the #clock-cells, clock-output-names properties

and then not use the I2S node as a clock supplier.

Optional SoC Specific Properties:

Optional SoC Specific Properties:

- pinctrl-0: Should specify pin control groups used for this controller.

- pinctrl-0: Should specify pin control groups used for this controller.

- pinctrl-names: Should contain only one value - "default".

- pinctrl-names: Should contain only one value - "default".

Example:

Example:

i2s0: i2s@03830000 {

i2s0: i2s@03830000 {

		<&clock_audss EXYNOS_I2S_BUS>,

		<&clock_audss EXYNOS_I2S_BUS>,

		<&clock_audss EXYNOS_SCLK_I2S>;

		<&clock_audss EXYNOS_SCLK_I2S>;

	clock-names = "iis", "i2s_opclk0", "i2s_opclk1";

	clock-names = "iis", "i2s_opclk0", "i2s_opclk1";

	#clock-cells;

	clock-output-names = "i2s_cdclk0";

	samsung,idma-addr = <0x03000000>;

	samsung,idma-addr = <0x03000000>;

	pinctrl-names = "default";

	pinctrl-names = "default";

	pinctrl-0 = <&i2s0_bus>;

	pinctrl-0 = <&i2s0_bus>;

					  it can be specified via "clocks" if system has

					  it can be specified via "clocks" if system has

					  clock node (= common clock), or "system-clock-frequency"

					  clock node (= common clock), or "system-clock-frequency"

					  (if system doens't support common clock)

					  (if system doens't support common clock)

					  If a clock is specified, it is

					  enabled with clk_prepare_enable()

					  in dai startup() and disabled with

					  clk_disable_unprepare() in dai

					  shutdown().

Example 1 - single DAI link:

Example 1 - single DAI link:

STA32X audio CODEC

The driver for this device only supports I2C.

Required properties:

  - compatible: "st,sta32x"

  - reg: the I2C address of the device for I2C

  - reset-gpios: a GPIO spec for the reset pin. If specified, it will be

		 deasserted before communication to the codec starts.

  - power-down-gpios: a GPIO spec for the power down pin. If specified,

		      it will be deasserted before communication to the codec

		      starts.

  - Vdda-supply: regulator spec, providing 3.3V

  - Vdd3-supply: regulator spec, providing 3.3V

  - Vcc-supply: regulator spec, providing 5V - 26V

Optional properties:

  -  st,output-conf: number, Selects the output configuration:

	0: 2-channel (full-bridge) power, 2-channel data-out

	1: 2 (half-bridge). 1 (full-bridge) on-board power

	2: 2 Channel (Full-Bridge) Power, 1 Channel FFX

	3: 1 Channel Mono-Parallel

	If parameter is missing, mode 0 will be enabled.

	This property has to be specified as '/bits/ 8' value.

  -  st,ch1-output-mapping: Channel 1 output mapping

  -  st,ch2-output-mapping: Channel 2 output mapping

  -  st,ch3-output-mapping: Channel 3 output mapping

	0: Channel 1

	1: Channel 2

	2: Channel 3

	If parameter is missing, channel 1 is chosen.

	This properties have to be specified as '/bits/ 8' values.

  -  st,thermal-warning-recover:

	If present, thermal warning recovery is enabled.

  -  st,thermal-warning-adjustment:

	If present, thermal warning adjustment is enabled.

  -  st,fault-detect-recovery:

	If present, then fault recovery will be enabled.

  -  st,drop-compensation-ns: number

	Only required for "st,ffx-power-output-mode" ==

	"variable-drop-compensation".

	Specifies the drop compensation in nanoseconds.

	The value must be in the range of 0..300, and only

	multiples of 20 are allowed. Default is 140ns.

  -  st,max-power-use-mpcc:

	If present, then MPCC bits are used for MPC coefficients,

	otherwise standard MPC coefficients are used.

  -  st,max-power-corr:

	If present, power bridge correction for THD reduction near maximum

	power output is enabled.

  -  st,am-reduction-mode:

	If present, FFX mode runs in AM reduction mode, otherwise normal

	FFX mode is used.

  -  st,odd-pwm-speed-mode:

	If present, PWM speed mode run on odd speed mode (341.3 kHz) on all

	channels. If not present, normal PWM spped mode (384 kHz) will be used.

  -  st,invalid-input-detect-mute:

	If present, automatic invalid input detect mute is enabled.

Example:

codec: sta32x@38 {

	compatible = "st,sta32x";

	reg = <0x1c>;

	reset-gpios = <&gpio1 19 0>;

	power-down-gpios = <&gpio1 16 0>;

	st,output-conf = /bits/ 8  <0x3>;	// set output to 2-channel

						// (full-bridge) power,

						// 2-channel data-out

	st,ch1-output-mapping = /bits/ 8 <0>;	// set channel 1 output ch 1

	st,ch2-output-mapping = /bits/ 8 <0>;	// set channel 2 output ch 1

	st,ch3-output-mapping = /bits/ 8 <0>;	// set channel 3 output ch 1

	st,max-power-correction;		// enables power bridge

						// correction for THD reduction

						// near maximum power output

	st,invalid-input-detect-mute;		// mute if no valid digital

						// audio signal is provided.

};

#ifndef _DT_BINDINGS_SAMSUNG_I2S_H

#define _DT_BINDINGS_SAMSUNG_I2S_H

#define CLK_I2S_CDCLK		0

#define CLK_I2S_RCLK_SRC	1

#define CLK_I2S_RCLK_PSR	2

#endif /* _DT_BINDINGS_SAMSUNG_I2S_H */

	unsigned int sysclk;

	unsigned int sysclk;

	int slots;

	int slots;

	int slot_width;

	int slot_width;

	struct clk *clk;

};

};

struct asoc_simple_card_info {

struct asoc_simple_card_info {