Commit cafed755 authored by Marcel Ziswiler's avatar Marcel Ziswiler Committed by Thierry Reding
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ARM: tegra: colibri_t20: get rid of fake clocks simple bus



Get rid of the fake clocks simple bus and use node names as per the
actual schematics.

Signed-off-by: default avatarMarcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
parent 8f4a8e09
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+4 −11
Original line number Diff line number Diff line
@@ -701,18 +701,11 @@
		vbus-supply = <&reg_lan_v_bus>;
	};

	clocks {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <0>;

		clk32k_in: clock@0 {
	clk32k_in: xtal3 {
		compatible = "fixed-clock";
			reg = <0>;
		#clock-cells = <0>;
		clock-frequency = <32768>;
	};
	};

	reg_lan_v_bus: regulator-lan-v-bus {
		compatible = "regulator-fixed";