Commit cadf2120 authored by Paul Handrigan's avatar Paul Handrigan Committed by Mark Brown
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ASoC: cs42l73: If Internal MCLK is >= 6.4MHz, then set SCLK to 64*Fs. 



Signed-off-by: default avatarPaul Handrigan <Paul.Handrigan@cirrus.com>
Acked-by: default avatarBrian Austin <brian.austin@cirrus.com>
Signed-off-by: default avatarMark Brown <broonie@opensource.wolfsonmicro.com>
parent 6dbe51c2

sound/soc/codecs/cs42l73.c

+5 −1
Original line number Diff line number Diff line
@@ -1180,6 +1180,10 @@ static int cs42l73_pcm_hw_params(struct snd_pcm_substream *substream, 
		priv->config[id].mmcc &= 0xC0;

		priv->config[id].mmcc |= cs42l73_mclk_coeffs[mclk_coeff].mmcc;

		priv->config[id].spc &= 0xFC;

		/* Use SCLK=64*Fs if internal MCLK >= 6.4MHz */

		if (priv->mclk >= 6400000)

			priv->config[id].spc |= MCK_SCLK_64FS;

		else

			priv->config[id].spc |= MCK_SCLK_MCLK;

	} else {

		/* CS42L73 Slave */

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