Commit ca78fdeb authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'drm-fixes-2020-01-03' of git://anongit.freedesktop.org/drm/drm 

Pull drm fixes from Dave Airlie:
 "New Years fixes! Mostly amdgpu with a light smattering of arm
  graphics, and two AGP warning fixes.

  Quiet as expected, hopefully we don't get a post holiday rush.

  agp:
   - two unused variable removed

  amdgpu:
   - ATPX regression fix
   - SMU metrics table locking fixes
   - gfxoff fix for raven
   - RLC firmware loading stability fix

  mediatek:
   - external display fix
   - dsi timing fix

  sun4i:
   - Fix double-free in connector/encoder cleanup (Stefan)

  maildp:
   - Make vtable static (Ben)"

* tag 'drm-fixes-2020-01-03' of git://anongit.freedesktop.org/drm/drm:
  agp: remove unused variable arqsz in agp_3_5_enable()
  agp: remove unused variable mcapndx
  drm/amdgpu: correct RLC firmwares loading sequence
  drm/amdgpu: enable gfxoff for raven1 refresh
  drm/amdgpu/smu: add metrics table lock for vega20 (v2)
  drm/amdgpu/smu: add metrics table lock for navi (v2)
  drm/amdgpu/smu: add metrics table lock for arcturus (v2)
  drm/amdgpu/smu: add metrics table lock
  Revert "drm/amdgpu: simplify ATPX detection"
  drm/arm/mali: make malidp_mw_connector_helper_funcs static
  drm/sun4i: hdmi: Remove duplicate cleanup calls
  drm/mediatek: reduce the hbp and hfp for phy timing
  drm/mediatek: Fix can't get component for external display plane.
  drm/mediatek: Check return value of mtk_drm_ddp_comp_for_plane.
parents 15f0ec94 a6204fc7

drivers/char/agp/isoch.c

+1 −8
Original line number Diff line number Diff line
@@ -84,7 +84,6 @@ static int agp_3_5_isochronous_node_enable(struct agp_bridge_data *bridge, 
	unsigned int cdev = 0;

	u32 mnistat, tnistat, tstatus, mcmd;

	u16 tnicmd, mnicmd;

	u8 mcapndx;

	u32 tot_bw = 0, tot_n = 0, tot_rq = 0, y_max, rq_isoch, rq_async;

	u32 step, rem, rem_isoch, rem_async;

	int ret = 0;
@@ -138,8 +137,6 @@ static int agp_3_5_isochronous_node_enable(struct agp_bridge_data *bridge, 
		cur = list_entry(pos, struct agp_3_5_dev, list);

		dev = cur->dev;



		mcapndx = cur->capndx;



		pci_read_config_dword(dev, cur->capndx+AGPNISTAT, &mnistat);



		master[cdev].maxbw = (mnistat >> 16) & 0xff;
@@ -251,8 +248,6 @@ static int agp_3_5_isochronous_node_enable(struct agp_bridge_data *bridge, 
		cur = master[cdev].dev;

		dev = cur->dev;



		mcapndx = cur->capndx;



		master[cdev].rq += (cdev == ndevs - 1)

		              ? (rem_async + rem_isoch) : step;
@@ -319,7 +314,7 @@ int agp_3_5_enable(struct agp_bridge_data *bridge) 
{

	struct pci_dev *td = bridge->dev, *dev = NULL;

	u8 mcapndx;

	u32 isoch, arqsz;

	u32 isoch;

	u32 tstatus, mstatus, ncapid;

	u32 mmajor;

	u16 mpstat;
@@ -334,8 +329,6 @@ int agp_3_5_enable(struct agp_bridge_data *bridge) 
	if (isoch == 0)	/* isoch xfers not available, bail out. */

		return -ENODEV;



	arqsz     = (tstatus >> 13) & 0x7;



	/*

	 * Allocate a head for our AGP 3.5 device list

	 * (multiple AGP v3 devices are allowed behind a single bridge).

drivers/gpu/drm/amd/amdgpu/amdgpu_atpx_handler.c

+11 −1
Original line number Diff line number Diff line
@@ -613,7 +613,17 @@ static bool amdgpu_atpx_detect(void) 
	bool d3_supported = false;

	struct pci_dev *parent_pdev;



	while ((pdev = pci_get_class(PCI_BASE_CLASS_DISPLAY << 16, pdev)) != NULL) {

	while ((pdev = pci_get_class(PCI_CLASS_DISPLAY_VGA << 8, pdev)) != NULL) {

		vga_count++;



		has_atpx |= (amdgpu_atpx_pci_probe_handle(pdev) == true);



		parent_pdev = pci_upstream_bridge(pdev);

		d3_supported |= parent_pdev && parent_pdev->bridge_d3;

		amdgpu_atpx_get_quirks(pdev);

	}



	while ((pdev = pci_get_class(PCI_CLASS_DISPLAY_OTHER << 8, pdev)) != NULL) {

		vga_count++;



		has_atpx |= (amdgpu_atpx_pci_probe_handle(pdev) == true);

drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c

+1 −1
Original line number Diff line number Diff line
@@ -1488,7 +1488,7 @@ out: 


		/* Start rlc autoload after psp recieved all the gfx firmware */

		if (psp->autoload_supported && ucode->ucode_id == (amdgpu_sriov_vf(adev) ?

		    AMDGPU_UCODE_ID_CP_MEC2 : AMDGPU_UCODE_ID_RLC_RESTORE_LIST_SRM_MEM)) {

		    AMDGPU_UCODE_ID_CP_MEC2 : AMDGPU_UCODE_ID_RLC_G)) {

			ret = psp_rlc_autoload(psp);

			if (ret) {

				DRM_ERROR("Failed to start rlc autoload\n");

drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h

+1 −1
Original line number Diff line number Diff line
@@ -292,10 +292,10 @@ enum AMDGPU_UCODE_ID { 
	AMDGPU_UCODE_ID_CP_MEC2_JT,

	AMDGPU_UCODE_ID_CP_MES,

	AMDGPU_UCODE_ID_CP_MES_DATA,

	AMDGPU_UCODE_ID_RLC_G,

	AMDGPU_UCODE_ID_RLC_RESTORE_LIST_CNTL,

	AMDGPU_UCODE_ID_RLC_RESTORE_LIST_GPM_MEM,

	AMDGPU_UCODE_ID_RLC_RESTORE_LIST_SRM_MEM,

	AMDGPU_UCODE_ID_RLC_G,

	AMDGPU_UCODE_ID_STORAGE,

	AMDGPU_UCODE_ID_SMC,

	AMDGPU_UCODE_ID_UVD,

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

+4 −11
Original line number Diff line number Diff line
@@ -1052,17 +1052,10 @@ static void gfx_v9_0_check_if_need_gfxoff(struct amdgpu_device *adev) 
	case CHIP_VEGA20:

		break;

	case CHIP_RAVEN:

		/* Disable GFXOFF on original raven.  There are combinations

		 * of sbios and platforms that are not stable.

		 */

		if (!(adev->rev_id >= 0x8 || adev->pdev->device == 0x15d8))

			adev->pm.pp_feature &= ~PP_GFXOFF_MASK;

		else if (!(adev->rev_id >= 0x8 || adev->pdev->device == 0x15d8)

			 &&((adev->gfx.rlc_fw_version != 106 &&

			     adev->gfx.rlc_fw_version < 531) ||

			    (adev->gfx.rlc_fw_version == 53815) ||

			    (adev->gfx.rlc_feature_version < 1) ||

			    !adev->gfx.rlc.is_rlc_v2_1))

		if (!(adev->rev_id >= 0x8 ||

		      adev->pdev->device == 0x15d8) &&

		    (adev->pm.fw_version < 0x41e2b || /* not raven1 fresh */

		     !adev->gfx.rlc.is_rlc_v2_1)) /* without rlc save restore ucodes */

			adev->pm.pp_feature &= ~PP_GFXOFF_MASK;



		if (adev->pm.pp_feature & PP_GFXOFF_MASK)

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