ARM: 8847/1: pm: fix HYP/SVC mode mismatch when MCPM is used (ca70ea43) · Commits · 戴 / test

MCPM does a soft reset of the CPUs and uses common cpu_resume() routine to perform low-level platform initialization. This results in a try to install HYP stubs for the second time for each CPU and results in false HYP/SVC mode mismatch detection. The HYP stubs are already installed at the beginning of the kernel initialization on the boot CPU (head.S) or in the secondary_startup() for other CPUs. To fix this issue MCPM code should use a cpu_resume() routine without HYP stubs installation. This change fixes HYP/SVC mode mismatch on Samsung Exynos5422-based Odroid XU3/XU4/HC1 boards. Fixes: ("ARM: 8081/1: MCPM: provide infrastructure to allow for MCPM loopback") Signed-off-by:

Marek Szyprowski <m.szyprowski@samsung.com> Acked-by:

Nicolas Pitre <nico@linaro.org> Tested-by:

Anand Moon <linux.amoon@gmail.com> Signed-off-by:

Russell King <rmk+kernel@armlinux.org.uk>

arch/arm/common/mcpm_entry.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -381,7 +381,7 @@ static int __init nocache_trampoline(unsigned long _arg)
		unsigned int cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1);
		phys_reset_t phys_reset;

		mcpm_set_entry_vector(cpu, cluster, cpu_resume);
		mcpm_set_entry_vector(cpu, cluster, cpu_resume_no_hyp);
		setup_mm_for_reboot();

		__mcpm_cpu_going_down(cpu, cluster);

arch/arm/include/asm/suspend.h

+1 −0

Original line number	Diff line number	Diff line
		@@ -10,6 +10,7 @@ struct sleep_save_sp {
		};

		extern void cpu_resume(void);
		extern void cpu_resume_no_hyp(void);
		extern void cpu_resume_arm(void);
		extern int cpu_suspend(unsigned long, int (*)(unsigned long));

arch/arm/kernel/sleep.S

+12 −0

Original line number	Diff line number	Diff line
		@@ -120,6 +120,14 @@ ENDPROC(cpu_resume_after_mmu)
		.text
		.align

		#ifdef CONFIG_MCPM
		.arm
		THUMB( .thumb )
		ENTRY(cpu_resume_no_hyp)
		ARM_BE8(setend be) @ ensure we are in BE mode
		b no_hyp
		#endif

		#ifdef CONFIG_MMU
		.arm
		ENTRY(cpu_resume_arm)
		@@ -135,6 +143,7 @@ ARM_BE8(setend be) @ ensure we are in BE mode
		bl __hyp_stub_install_secondary
		#endif
		safe_svcmode_maskall r1
		no_hyp:
		mov r1, #0
		ALT_SMP(mrc p15, 0, r0, c0, c0, 5)
		ALT_UP_B(1f)
		@@ -163,6 +172,9 @@ ENDPROC(cpu_resume)

		#ifdef CONFIG_MMU
		ENDPROC(cpu_resume_arm)
		#endif
		#ifdef CONFIG_MCPM
		ENDPROC(cpu_resume_no_hyp)
		#endif

		.align 2

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