drm/i915/gtt: Account for preallocation in asserts (ca5930b1) · Commits · 戴 / test

Our asserts allow for the PDEs to be allocated concurrently, but we did not account for the aliasing-ppgtt to be preallocated on top. Testcase: igt/gem_ppgtt #bsw Signed-off-by:

Chris Wilson <chris@chris-wilson.co.uk> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com> Acked-by:

Mika Kuoppala <mika.kuoppala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20191207221453.2802627-1-chris@chris-wilson.co.uk

drivers/gpu/drm/i915/i915_gem_gtt.c

+4 −2

Original line number	Diff line number	Diff line
		@@ -53,6 +53,8 @@
		#define DBG(...)
		#endif

		#define NALLOC 3 /* 1 normal, 1 for concurrent threads, 1 for preallocation */

		/**
		* DOC: Global GTT views
		*
		@@ -793,7 +795,7 @@ __set_pd_entry(struct i915_page_directory * const pd,
		u64 (*encode)(const dma_addr_t, const enum i915_cache_level))
		{
		/* Each thread pre-pins the pd, and we may have a thread per pde. */
		GEM_BUG_ON(atomic_read(px_used(pd)) > 2 * ARRAY_SIZE(pd->entry));
		GEM_BUG_ON(atomic_read(px_used(pd)) > NALLOC * ARRAY_SIZE(pd->entry));

		atomic_inc(px_used(pd));
		pd->entry[idx] = to;
		@@ -1128,7 +1130,7 @@ static int __gen8_ppgtt_alloc(struct i915_address_space * const vm,

		atomic_add(count, &pt->used);
		/* All other pdes may be simultaneously removed */
		GEM_BUG_ON(atomic_read(&pt->used) > 2 * I915_PDES);
		GEM_BUG_ON(atomic_read(&pt->used) > NALLOC * I915_PDES);
		*start += count;
		}
		} while (idx++, --len);

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