Unverified Commit ca4e2ac2 authored Oct 08, 2020 by Serge Semin Committed by Mark Brown Oct 08, 2020

spi: dw: Add Baikal-T1 SPI Controller bindings



These controllers are based on the DW APB SSI IP-core and embedded into
the SoC, so two of them are equipped with IRQ, DMA, 64 words FIFOs and 4
native CS, while another one as being utilized by the Baikal-T1 System
Boot Controller has got a very limited resources: no IRQ, no DMA, only a
single native chip-select and just 8 bytes Tx/Rx FIFOs available. That's
why we have to mark the IRQ to be optional for the later interface.

The SPI controller embedded into the Baikal-T1 System Boot Controller can
be also used to directly access an external SPI flash by means of a
dedicated FSM. The corresponding MMIO region availability is switchable by
the embedded multiplexor, which phandle can be specified in the dts node.

* We added a new example to test out the non-standard Baikal-T1 System
Boot SPI Controller DT binding.

Co-developed-by: Ramil Zaripov <Ramil.Zaripov@baikalelectronics.ru>
Signed-off-by: Ramil Zaripov <Ramil.Zaripov@baikalelectronics.ru>
Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20201007235511.4935-21-Sergey.Semin@baikalelectronics.ru


Signed-off-by: Mark Brown <broonie@kernel.org>

parent abf00907

Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml

+31 −2

Original line number	Diff line number	Diff line
		@@ -22,6 +22,21 @@ allOf:
		properties:
		reg:
		minItems: 2
		- if:
		properties:
		compatible:
		contains:
		enum:
		- baikal,bt1-sys-ssi
		then:
		properties:
		mux-controls:
		maxItems: 1
		required:
		- mux-controls
		else:
		required:
		- interrupts

		properties:
		compatible:
		@@ -46,12 +61,16 @@ properties:
		- const: snps,dw-apb-ssi
		- description: Intel Keem Bay SPI Controller
		const: intel,keembay-ssi
		- description: Baikal-T1 SPI Controller
		const: baikal,bt1-ssi
		- description: Baikal-T1 System Boot SPI Controller
		const: baikal,bt1-sys-ssi

		reg:
		minItems: 1
		items:
		- description: DW APB SSI controller memory mapped registers
		- description: SPI MST region map
		- description: SPI MST region map or directly mapped SPI ROM

		interrupts:
		maxItems: 1
		@@ -129,7 +148,6 @@ required:
		- reg
		- "#address-cells"
		- "#size-cells"
		- interrupts
		- clocks

		examples:
		@@ -151,4 +169,15 @@ examples:
		rx-sample-delay-ns = <7>;
		};
		};
		- \|
		spi@1f040100 {
		compatible = "baikal,bt1-sys-ssi";
		reg = <0x1f040100 0x900>,
		<0x1c000000 0x1000000>;
		#address-cells = <1>;
		#size-cells = <0>;
		mux-controls = <&boot_mux>;
		clocks = <&ccu_sys>;
		clock-names = "ssi_clk";
		};
		...

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