Loading arch/arm/kernel/smp.c +1 −0 Original line number Diff line number Diff line Loading @@ -176,6 +176,7 @@ asmlinkage void __cpuinit secondary_start_kernel(void) cpu_set(cpu, mm->cpu_vm_mask); cpu_switch_mm(mm->pgd, mm); enter_lazy_tlb(mm, current); local_flush_tlb_all(); cpu_init(); Loading arch/arm/lib/bitops.h +1 −1 Original line number Diff line number Diff line Loading @@ -7,7 +7,7 @@ 1: ldrexb r2, [r1] \instr r2, r2, r3 strexb r0, r2, [r1] cmpne r0, #0 cmp r0, #0 bne 1b mov pc, lr .endm Loading arch/arm/mach-integrator/platsmp.c +2 −0 Original line number Diff line number Diff line Loading @@ -15,6 +15,7 @@ #include <linux/mm.h> #include <asm/atomic.h> #include <asm/cacheflush.h> #include <asm/delay.h> #include <asm/mmu_context.h> #include <asm/procinfo.h> Loading Loading @@ -80,6 +81,7 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle) * "cpu" is Linux's internal ID. */ pen_release = cpu; flush_cache_all(); /* * XXX Loading include/asm-arm/bitops.h +5 −0 Original line number Diff line number Diff line Loading @@ -229,6 +229,7 @@ extern int _find_next_zero_bit_be(const void * p, int size, int offset); extern int _find_first_bit_be(const unsigned long *p, unsigned size); extern int _find_next_bit_be(const unsigned long *p, int size, int offset); #ifndef CONFIG_SMP /* * The __* form of bitops are non-atomic and may be reordered. */ Loading @@ -241,6 +242,10 @@ extern int _find_next_bit_be(const unsigned long *p, int size, int offset); (__builtin_constant_p(nr) ? \ ____atomic_##name(nr, p) : \ _##name##_be(nr,p)) #else #define ATOMIC_BITOP_LE(name,nr,p) _##name##_le(nr,p) #define ATOMIC_BITOP_BE(name,nr,p) _##name##_be(nr,p) #endif #define NONATOMIC_BITOP(name,nr,p) \ (____nonatomic_##name(nr, p)) Loading Loading
arch/arm/kernel/smp.c +1 −0 Original line number Diff line number Diff line Loading @@ -176,6 +176,7 @@ asmlinkage void __cpuinit secondary_start_kernel(void) cpu_set(cpu, mm->cpu_vm_mask); cpu_switch_mm(mm->pgd, mm); enter_lazy_tlb(mm, current); local_flush_tlb_all(); cpu_init(); Loading
arch/arm/lib/bitops.h +1 −1 Original line number Diff line number Diff line Loading @@ -7,7 +7,7 @@ 1: ldrexb r2, [r1] \instr r2, r2, r3 strexb r0, r2, [r1] cmpne r0, #0 cmp r0, #0 bne 1b mov pc, lr .endm Loading
arch/arm/mach-integrator/platsmp.c +2 −0 Original line number Diff line number Diff line Loading @@ -15,6 +15,7 @@ #include <linux/mm.h> #include <asm/atomic.h> #include <asm/cacheflush.h> #include <asm/delay.h> #include <asm/mmu_context.h> #include <asm/procinfo.h> Loading Loading @@ -80,6 +81,7 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle) * "cpu" is Linux's internal ID. */ pen_release = cpu; flush_cache_all(); /* * XXX Loading
include/asm-arm/bitops.h +5 −0 Original line number Diff line number Diff line Loading @@ -229,6 +229,7 @@ extern int _find_next_zero_bit_be(const void * p, int size, int offset); extern int _find_first_bit_be(const unsigned long *p, unsigned size); extern int _find_next_bit_be(const unsigned long *p, int size, int offset); #ifndef CONFIG_SMP /* * The __* form of bitops are non-atomic and may be reordered. */ Loading @@ -241,6 +242,10 @@ extern int _find_next_bit_be(const unsigned long *p, int size, int offset); (__builtin_constant_p(nr) ? \ ____atomic_##name(nr, p) : \ _##name##_be(nr,p)) #else #define ATOMIC_BITOP_LE(name,nr,p) _##name##_le(nr,p) #define ATOMIC_BITOP_BE(name,nr,p) _##name##_be(nr,p) #endif #define NONATOMIC_BITOP(name,nr,p) \ (____nonatomic_##name(nr, p)) Loading
