Commit ca4570a4 authored by Maxime Ripard's avatar Maxime Ripard Committed by Ulf Hansson
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dt-bindings: mmc: sun4i: Add YAML schemas



Switch the DT binding to a YAML schema to enable the DT validation.

Reviewed-by: default avatarRob Herring <robh@kernel.org>
Signed-off-by: default avatarMaxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
parent f9b79898
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# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/mmc/allwinner,sun4i-a10-mmc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Allwinner A10 MMC Controller Device Tree Bindings

allOf:
  - $ref: "mmc-controller.yaml"

maintainers:
  - Chen-Yu Tsai <wens@csie.org>
  - Maxime Ripard <maxime.ripard@bootlin.com>

properties:
  "#address-cells": true
  "#size-cells": true

  compatible:
    oneOf:
      - const: allwinner,sun4i-a10-mmc
      - const: allwinner,sun5i-a13-mmc
      - const: allwinner,sun7i-a20-mmc
      - const: allwinner,sun8i-a83t-emmc
      - const: allwinner,sun9i-a80-mmc
      - const: allwinner,sun50i-a64-emmc
      - const: allwinner,sun50i-a64-mmc
      - items:
          - const: allwinner,sun8i-a83t-mmc
          - const: allwinner,sun7i-a20-mmc
      - items:
          - const: allwinner,sun50i-h6-emmc
          - const: allwinner,sun50i-a64-emmc
      - items:
          - const: allwinner,sun50i-h6-mmc
          - const: allwinner,sun50i-a64-mmc
      - items:
          - const: allwinner,sun8i-r40-emmc
          - const: allwinner,sun50i-a64-emmc
      - items:
          - const: allwinner,sun8i-r40-mmc
          - const: allwinner,sun50i-a64-mmc

  reg:
    maxItems: 1

  interrupts:
    maxItems: 1

  clocks:
    minItems: 2
    maxItems: 4
    items:
      - description: Bus Clock
      - description: Module Clock
      - description: Output Clock
      - description: Sample Clock

  clock-names:
    minItems: 2
    maxItems: 4
    items:
      - const: ahb
      - const: mmc
      - const: output
      - const: sample

  resets:
    maxItems: 1

  reset-names:
    const: ahb

required:
  - compatible
  - reg
  - interrupts
  - clocks
  - clock-names

examples:
  - |
    mmc0: mmc@1c0f000 {
        compatible = "allwinner,sun5i-a13-mmc";
        reg = <0x01c0f000 0x1000>;
        clocks = <&ahb_gates 8>, <&mmc0_clk>;
        clock-names = "ahb", "mmc";
        interrupts = <32>;
        bus-width = <4>;
        cd-gpios = <&pio 7 1 0>;
    };

# FIXME: We should set it, but it would report all the generic
# properties as additional properties.
# additionalProperties: false

...
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* Allwinner sunxi MMC controller

The highspeed MMC host controller on Allwinner SoCs provides an interface
for MMC, SD and SDIO types of memory cards.

Supported maximum speeds are the ones of the eMMC standard 4.5 as well
as the speed of SD standard 3.0.
Absolute maximum transfer rate is 200MB/s

Required properties:
 - compatible : should be one of:
   * "allwinner,sun4i-a10-mmc"
   * "allwinner,sun5i-a13-mmc"
   * "allwinner,sun7i-a20-mmc"
   * "allwinner,sun8i-a83t-emmc"
   * "allwinner,sun9i-a80-mmc"
   * "allwinner,sun50i-a64-emmc"
   * "allwinner,sun50i-a64-mmc"
   * "allwinner,sun50i-h6-emmc", "allwinner.sun50i-a64-emmc"
   * "allwinner,sun50i-h6-mmc", "allwinner.sun50i-a64-mmc"
 - reg : mmc controller base registers
 - clocks : a list with 4 phandle + clock specifier pairs
 - clock-names : must contain "ahb", "mmc", "output" and "sample"
 - interrupts : mmc controller interrupt

Optional properties:
 - resets : phandle + reset specifier pair
 - reset-names : must contain "ahb"
 - for cd, bus-width and additional generic mmc parameters
   please refer to mmc.txt within this directory

Examples:
	- Within .dtsi:
	mmc0: mmc@1c0f000 {
		compatible = "allwinner,sun5i-a13-mmc";
		reg = <0x01c0f000 0x1000>;
		clocks = <&ahb_gates 8>, <&mmc0_clk>, <&mmc0_output_clk>, <&mmc0_sample_clk>;
		clock-names = "ahb", "mod", "output", "sample";
		interrupts = <0 32 4>;
		status = "disabled";
	};

	- Within dts:
	mmc0: mmc@1c0f000 {
		pinctrl-names = "default", "default";
		pinctrl-0 = <&mmc0_pins_a>;
		pinctrl-1 = <&mmc0_cd_pin_reference_design>;
		bus-width = <4>;
		cd-gpios = <&pio 7 1 0>; /* PH1 */
		cd-inverted;
		status = "okay";
	};