Commit ca1b6692 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'ras_updates_for_v5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip 

Pull RAS updates from Borislav Petkov:

 - Extend the recovery from MCE in kernel space also to processes which
   encounter an MCE in kernel space but while copying from user memory
   by sending them a SIGBUS on return to user space and umapping the
   faulty memory, by Tony Luck and Youquan Song.

 - memcpy_mcsafe() rework by splitting the functionality into
   copy_mc_to_user() and copy_mc_to_kernel(). This, as a result, enables
   support for new hardware which can recover from a machine check
   encountered during a fast string copy and makes that the default and
   lets the older hardware which does not support that advance recovery,
   opt in to use the old, fragile, slow variant, by Dan Williams.

 - New AMD hw enablement, by Yazen Ghannam and Akshay Gupta.

 - Do not use MSR-tracing accessors in #MC context and flag any fault
   while accessing MCA architectural MSRs as an architectural violation
   with the hope that such hw/fw misdesigns are caught early during the
   hw eval phase and they don't make it into production.

 - Misc fixes, improvements and cleanups, as always.

* tag 'ras_updates_for_v5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86/mce: Allow for copy_mc_fragile symbol checksum to be generated
  x86/mce: Decode a kernel instruction to determine if it is copying from user
  x86/mce: Recover from poison found while copying from user space
  x86/mce: Avoid tail copy when machine check terminated a copy from user
  x86/mce: Add _ASM_EXTABLE_CPY for copy user access
  x86/mce: Provide method to find out the type of an exception handler
  x86/mce: Pass pointer to saved pt_regs to severity calculation routines
  x86/copy_mc: Introduce copy_mc_enhanced_fast_string()
  x86, powerpc: Rename memcpy_mcsafe() to copy_mc_to_{user, kernel}()
  x86/mce: Drop AMD-specific "DEFERRED" case from Intel severity rule list
  x86/mce: Add Skylake quirk for patrol scrub reported errors
  RAS/CEC: Convert to DEFINE_SHOW_ATTRIBUTE()
  x86/mce: Annotate mce_rd/wrmsrl() with noinstr
  x86/mce/dev-mcelog: Do not update kflags on AMD systems
  x86/mce: Stop mce_reign() from re-computing severity for every CPU
  x86/mce: Make mce_rdmsrl() panic on an inaccessible MSR
  x86/mce: Increase maximum number of banks to 64
  x86/mce: Delay clearing IA32_MCG_STATUS to the end of do_machine_check()
  x86/MCE/AMD, EDAC/mce_amd: Remove struct smca_hwid.xec_bitmap
  RAS/CEC: Fix cec_init() prototype
parents a9a4b7d9 b3149ffc

arch/powerpc/Kconfig

+1 −1
Original line number Diff line number Diff line
@@ -135,7 +135,7 @@ config PPC 
	select ARCH_HAS_STRICT_KERNEL_RWX	if (PPC32 && !HIBERNATION)

	select ARCH_HAS_TICK_BROADCAST		if GENERIC_CLOCKEVENTS_BROADCAST

	select ARCH_HAS_UACCESS_FLUSHCACHE

	select ARCH_HAS_UACCESS_MCSAFE		if PPC64

	select ARCH_HAS_COPY_MC			if PPC64

	select ARCH_HAS_UBSAN_SANITIZE_ALL

	select ARCH_HAVE_NMI_SAFE_CMPXCHG

	select ARCH_KEEP_MEMBLOCK

arch/powerpc/include/asm/string.h

+0 −2
Original line number Diff line number Diff line
@@ -53,9 +53,7 @@ void *__memmove(void *to, const void *from, __kernel_size_t n); 
#ifndef CONFIG_KASAN

#define __HAVE_ARCH_MEMSET32

#define __HAVE_ARCH_MEMSET64

#define __HAVE_ARCH_MEMCPY_MCSAFE



extern int memcpy_mcsafe(void *dst, const void *src, __kernel_size_t sz);

extern void *__memset16(uint16_t *, uint16_t v, __kernel_size_t);

extern void *__memset32(uint32_t *, uint32_t v, __kernel_size_t);

extern void *__memset64(uint64_t *, uint64_t v, __kernel_size_t);

arch/powerpc/include/asm/uaccess.h

+26 −14
Original line number Diff line number Diff line
@@ -435,6 +435,32 @@ do { \ 
extern unsigned long __copy_tofrom_user(void __user *to,

		const void __user *from, unsigned long size);



#ifdef CONFIG_ARCH_HAS_COPY_MC

unsigned long __must_check

copy_mc_generic(void *to, const void *from, unsigned long size);



static inline unsigned long __must_check

copy_mc_to_kernel(void *to, const void *from, unsigned long size)

{

	return copy_mc_generic(to, from, size);

}

#define copy_mc_to_kernel copy_mc_to_kernel



static inline unsigned long __must_check

copy_mc_to_user(void __user *to, const void *from, unsigned long n)

{

	if (likely(check_copy_size(from, n, true))) {

		if (access_ok(to, n)) {

			allow_write_to_user(to, n);

			n = copy_mc_generic((void *)to, from, n);

			prevent_write_to_user(to, n);

		}

	}



	return n;

}

#endif



#ifdef __powerpc64__

static inline unsigned long

raw_copy_in_user(void __user *to, const void __user *from, unsigned long n)
@@ -523,20 +549,6 @@ raw_copy_to_user(void __user *to, const void *from, unsigned long n) 
	return ret;

}



static __always_inline unsigned long __must_check

copy_to_user_mcsafe(void __user *to, const void *from, unsigned long n)

{

	if (likely(check_copy_size(from, n, true))) {

		if (access_ok(to, n)) {

			allow_write_to_user(to, n);

			n = memcpy_mcsafe((void *)to, from, n);

			prevent_write_to_user(to, n);

		}

	}



	return n;

}



unsigned long __arch_clear_user(void __user *addr, unsigned long size);



static inline unsigned long clear_user(void __user *addr, unsigned long size)

arch/powerpc/lib/Makefile

+1 −1
Original line number Diff line number Diff line
@@ -39,7 +39,7 @@ obj-$(CONFIG_PPC_BOOK3S_64) += copyuser_power7.o copypage_power7.o \ 
			       memcpy_power7.o



obj64-y	+= copypage_64.o copyuser_64.o mem_64.o hweight_64.o \

	   memcpy_64.o memcpy_mcsafe_64.o

	   memcpy_64.o copy_mc_64.o



ifndef CONFIG_PPC_QUEUED_SPINLOCKS

obj64-$(CONFIG_SMP)	+= locks.o

arch/powerpc/lib/memcpy_mcsafe_64.S→arch/powerpc/lib/copy_mc_64.S

+2 −2
Original line number Diff line number Diff line
@@ -50,7 +50,7 @@ err3; stb r0,0(r3) 
	blr





_GLOBAL(memcpy_mcsafe)

_GLOBAL(copy_mc_generic)

	mr	r7,r5

	cmpldi	r5,16

	blt	.Lshort_copy
@@ -239,4 +239,4 @@ err1; stb r0,0(r3) 
15:	li	r3,0

	blr



EXPORT_SYMBOL_GPL(memcpy_mcsafe);
 
EXPORT_SYMBOL_GPL(copy_mc_generic);

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