Commit ca02f96b authored by Suzuki K Poulose's avatar Suzuki K Poulose Committed by Andy Gross
Browse files

ARM: dts: qcom: Update coresight bindings for hardware ports 



Switch to the new hardware port bindings for coresight

Cc: Andy Gross <andy.gross@linaro.org>
Cc: David Brown <david.brown@linaro.org>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: default avatarSuzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: default avatarAndy Gross <andy.gross@linaro.org>
parent 703e699d

arch/arm/boot/dts/qcom-apq8064.dtsi

+40 −31
Original line number Diff line number Diff line
@@ -1611,13 +1611,14 @@ 
			clocks = <&rpmcc RPM_QDSS_CLK>;

			clock-names = "apb_pclk";



			in-ports {

				port {

					etb_in: endpoint {

					slave-mode;

						remote-endpoint = <&replicator_out0>;

					};

				};

			};

		};



		tpiu@1a03000 {

			compatible = "arm,coresight-tpiu", "arm,primecell";
@@ -1626,13 +1627,14 @@ 
			clocks = <&rpmcc RPM_QDSS_CLK>;

			clock-names = "apb_pclk";



			in-ports {

				port {

					tpiu_in: endpoint {

					slave-mode;

						remote-endpoint = <&replicator_out1>;

					};

				};

			};

		};



		replicator {

			compatible = "arm,coresight-replicator";
@@ -1640,7 +1642,7 @@ 
			clocks = <&rpmcc RPM_QDSS_CLK>;

			clock-names = "apb_pclk";



			ports {

			out-ports {

				#address-cells = <1>;

				#size-cells = <0>;
@@ -1656,10 +1658,11 @@ 
						remote-endpoint = <&tpiu_in>;

					};

				};

				port@2 {

					reg = <0>;

			};



			in-ports {

				port {

					replicator_in: endpoint {

						slave-mode;

						remote-endpoint = <&funnel_out>;

					};

				};
@@ -1673,7 +1676,7 @@ 
			clocks = <&rpmcc RPM_QDSS_CLK>;

			clock-names = "apb_pclk";



			ports {

			in-ports {

				#address-cells = <1>;

				#size-cells = <0>;
@@ -1687,33 +1690,31 @@ 
				port@0 {

					reg = <0>;

					funnel_in0: endpoint {

						slave-mode;

						remote-endpoint = <&etm0_out>;

					};

				};

				port@1 {

					reg = <1>;

					funnel_in1: endpoint {

						slave-mode;

						remote-endpoint = <&etm1_out>;

					};

				};

				port@4 {

					reg = <4>;

					funnel_in4: endpoint {

						slave-mode;

						remote-endpoint = <&etm2_out>;

					};

				};

				port@5 {

					reg = <5>;

					funnel_in5: endpoint {

						slave-mode;

						remote-endpoint = <&etm3_out>;

					};

				};

				port@8 {

					reg = <0>;

			};



			out-ports {

				port {

					funnel_out: endpoint {

						remote-endpoint = <&replicator_in>;

					};
@@ -1730,12 +1731,14 @@ 


			cpu = <&CPU0>;



			out-ports {

				port {

					etm0_out: endpoint {

						remote-endpoint = <&funnel_in0>;

					};

				};

			};

		};



		etm@1a1d000 {

			compatible = "arm,coresight-etm3x", "arm,primecell";
@@ -1746,12 +1749,14 @@ 


			cpu = <&CPU1>;



			out-ports {

				port {

					etm1_out: endpoint {

						remote-endpoint = <&funnel_in1>;

					};

				};

			};

		};



		etm@1a1e000 {

			compatible = "arm,coresight-etm3x", "arm,primecell";
@@ -1762,12 +1767,14 @@ 


			cpu = <&CPU2>;



			out-ports {

				port {

					etm2_out: endpoint {

						remote-endpoint = <&funnel_in4>;

					};

				};

			};

		};



		etm@1a1f000 {

			compatible = "arm,coresight-etm3x", "arm,primecell";
@@ -1778,6 +1785,7 @@ 


			cpu = <&CPU3>;



			out-ports {

				port {

					etm3_out: endpoint {

						remote-endpoint = <&funnel_in5>;
@@ -1786,4 +1794,5 @@ 
			};

		};

	};

};

#include "qcom-apq8064-pins.dtsi"

arch/arm/boot/dts/qcom-msm8974.dtsi

+56 −48
Original line number Diff line number Diff line
@@ -794,13 +794,14 @@ 
			clocks = <&rpmcc RPM_SMD_QDSS_CLK>, <&rpmcc RPM_SMD_QDSS_A_CLK>;

			clock-names = "apb_pclk", "atclk";



			in-ports {

				port {

					etr_in: endpoint {

					slave-mode;

						remote-endpoint = <&replicator_out0>;

					};

				};

			};

		};



		tpiu@fc318000 {

			compatible = "arm,coresight-tpiu", "arm,primecell";
@@ -809,13 +810,14 @@ 
			clocks = <&rpmcc RPM_SMD_QDSS_CLK>, <&rpmcc RPM_SMD_QDSS_A_CLK>;

			clock-names = "apb_pclk", "atclk";



			in-ports {

				port {

					tpiu_in: endpoint {

					 slave-mode;

						remote-endpoint = <&replicator_out1>;

					};

				 };

			};

		};



		replicator@fc31c000 {

			compatible = "arm,coresight-dynamic-replicator", "arm,primecell";
@@ -824,7 +826,7 @@ 
			clocks = <&rpmcc RPM_SMD_QDSS_CLK>, <&rpmcc RPM_SMD_QDSS_A_CLK>;

			clock-names = "apb_pclk", "atclk";



			ports {

			out-ports {

				#address-cells = <1>;

				#size-cells = <0>;
@@ -840,10 +842,11 @@ 
						remote-endpoint = <&tpiu_in>;

					};

				};

				port@2 {

					reg = <0>;

			};



			in-ports {

				port {

					replicator_in: endpoint {

						slave-mode;

						remote-endpoint = <&etf_out>;

					};

				};
@@ -857,20 +860,17 @@ 
			clocks = <&rpmcc RPM_SMD_QDSS_CLK>, <&rpmcc RPM_SMD_QDSS_A_CLK>;

			clock-names = "apb_pclk", "atclk";



			ports {

				#address-cells = <1>;

				#size-cells = <0>;



				port@0 {

					reg = <0>;

			out-ports {

				port {

					etf_out: endpoint {

						remote-endpoint = <&replicator_in>;

					};

				};

				port@1 {

					reg = <0>;

			};



			in-ports {

				port {

					etf_in: endpoint {

						slave-mode;

						remote-endpoint = <&merger_out>;

					};

				};
@@ -884,7 +884,7 @@ 
			clocks = <&rpmcc RPM_SMD_QDSS_CLK>, <&rpmcc RPM_SMD_QDSS_A_CLK>;

			clock-names = "apb_pclk", "atclk";



			ports {

			in-ports {

				#address-cells = <1>;

				#size-cells = <0>;
@@ -897,12 +897,13 @@ 
				port@1 {

					reg = <1>;

					merger_in1: endpoint {

						slave-mode;

						remote-endpoint = <&funnel1_out>;

					};

				};

				port@8 {

					reg = <0>;

			};



			out-ports {

				port {

					merger_out: endpoint {

						remote-endpoint = <&etf_in>;

					};
@@ -917,7 +918,7 @@ 
			clocks = <&rpmcc RPM_SMD_QDSS_CLK>, <&rpmcc RPM_SMD_QDSS_A_CLK>;

			clock-names = "apb_pclk", "atclk";



			ports {

			in-ports {

				#address-cells = <1>;

				#size-cells = <0>;
@@ -934,12 +935,13 @@ 
				port@5 {

					reg = <5>;

					funnel1_in5: endpoint {

						slave-mode;

						remote-endpoint = <&kpss_out>;

					};

				};

				port@8 {

					reg = <0>;

			};



			out-ports {

				port {

					funnel1_out: endpoint {

						remote-endpoint = <&merger_in1>;

					};
@@ -954,40 +956,38 @@ 
			clocks = <&rpmcc RPM_SMD_QDSS_CLK>, <&rpmcc RPM_SMD_QDSS_A_CLK>;

			clock-names = "apb_pclk", "atclk";



			ports {

			in-ports {

				#address-cells = <1>;

				#size-cells = <0>;



				port@0 {

					reg = <0>;

					kpss_in0: endpoint {

						slave-mode;

						remote-endpoint = <&etm0_out>;

					};

				};

				port@1 {

					reg = <1>;

					kpss_in1: endpoint {

						slave-mode;

						remote-endpoint = <&etm1_out>;

					};

				};

				port@2 {

					reg = <2>;

					kpss_in2: endpoint {

						slave-mode;

						remote-endpoint = <&etm2_out>;

					};

				};

				port@3 {

					reg = <3>;

					kpss_in3: endpoint {

						slave-mode;

						remote-endpoint = <&etm3_out>;

					};

				};

				port@8 {

					reg = <0>;

			};



			out-ports {

				port {

					kpss_out: endpoint {

						remote-endpoint = <&funnel1_in5>;

					};
@@ -1004,12 +1004,14 @@ 


			cpu = <&CPU0>;



			out-ports {

				port {

					etm0_out: endpoint {

						remote-endpoint = <&kpss_in0>;

					};

				};

			};

		};



		etm@fc33d000 {

			compatible = "arm,coresight-etm4x", "arm,primecell";
@@ -1020,12 +1022,14 @@ 


			cpu = <&CPU1>;



			out-ports {

				port {

					etm1_out: endpoint {

						remote-endpoint = <&kpss_in1>;

					};

				};

			};

		};



		etm@fc33e000 {

			compatible = "arm,coresight-etm4x", "arm,primecell";
@@ -1036,12 +1040,14 @@ 


			cpu = <&CPU2>;



			out-ports {

				port {

					etm2_out: endpoint {

						remote-endpoint = <&kpss_in2>;

					};

				};

			};

		};



		etm@fc33f000 {

			compatible = "arm,coresight-etm4x", "arm,primecell";
@@ -1052,6 +1058,7 @@ 


			cpu = <&CPU3>;



			out-ports {

				port {

					etm3_out: endpoint {

						remote-endpoint = <&kpss_in3>;
@@ -1059,6 +1066,7 @@ 
				};

			};

		};

	};



	smd {

		compatible = "qcom,smd";

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