Commit c9b25495 authored Jun 22, 2016 by Eli Cohen Committed by Doug Ledford Jun 23, 2016

IB/mlx5: Fix post send fence logic



If the caller specified IB_SEND_FENCE in the send flags of the work
request and no previous work request stated that the successive one
should be fenced, the work request would be executed without a fence.
This could result in RDMA read or atomic operations failure due to a MR
being invalidated. Fix this by adding the mlx5 enumeration for fencing
RDMA/atomic operations and fix the logic to apply this.

Fixes: e126ba97 ('mlx5: Add driver for Mellanox Connect-IB adapters')
Signed-off-by: Eli Cohen <eli@mellanox.com>
Signed-off-by: Leon Romanovsky <leon@kernel.org>
Signed-off-by: Doug Ledford <dledford@redhat.com>

parent b57141c1

drivers/infiniband/hw/mlx5/qp.c

+4 −3

Original line number	Diff line number	Diff line
		@@ -3332,11 +3332,12 @@ static u8 get_fence(u8 fence, struct ib_send_wr *wr)
		return MLX5_FENCE_MODE_SMALL_AND_FENCE;
		else
		return fence;
		} else if (unlikely(wr->send_flags & IB_SEND_FENCE)) {
		return MLX5_FENCE_MODE_FENCE;
		}

		} else {
		return 0;
		}
		}

		static int begin_wqe(struct mlx5_ib_qp qp, void *seg,
		struct mlx5_wqe_ctrl_seg **ctrl,

include/linux/mlx5/qp.h

+1 −0

Original line number	Diff line number	Diff line
		@@ -172,6 +172,7 @@ enum {
		enum {
		MLX5_FENCE_MODE_NONE = 0 << 5,
		MLX5_FENCE_MODE_INITIATOR_SMALL = 1 << 5,
		MLX5_FENCE_MODE_FENCE = 2 << 5,
		MLX5_FENCE_MODE_STRONG_ORDERING = 3 << 5,
		MLX5_FENCE_MODE_SMALL_AND_FENCE = 4 << 5,
		};

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