arm64: dts: lg: Fix SP804 users (c9794866) · Commits · 戴 / test

Even though the SP804 binding allows to specify only one clock, the primecell driver requires a named clock to activate the bus clock. Specify the one clock three times and provide some clock-names, to make the DT match the SP804 and primecell binding. Also add the missing arm,primecell compatible string. Link: https://lore.kernel.org/r/20200907121831.242281-4-andre.przywara@arm.com Signed-off-by:

Andre Przywara <andre.przywara@arm.com> Signed-off-by:

Olof Johansson <olof@lixom.net>

arch/arm64/boot/dts/lg/lg1312.dtsi

+3 −3

Original line number	Diff line number	Diff line
		@@ -131,11 +131,11 @@
		ranges;

		timers: timer@fd100000 {
		compatible = "arm,sp804";
		compatible = "arm,sp804", "arm,primecell";
		reg = <0x0 0xfd100000 0x1000>;
		interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&clk_bus>;
		clock-names = "apb_pclk";
		clocks = <&clk_bus>, <&clk_bus>, <&clk_bus>;
		clock-names = "timer0clk", "timer1clk", "apb_pclk";
		};
		wdog: watchdog@fd200000 {
		compatible = "arm,sp805", "arm,primecell";

arch/arm64/boot/dts/lg/lg1313.dtsi

+3 −3

Original line number	Diff line number	Diff line
		@@ -131,11 +131,11 @@
		ranges;

		timers: timer@fd100000 {
		compatible = "arm,sp804";
		compatible = "arm,sp804", "arm,primecell";
		reg = <0x0 0xfd100000 0x1000>;
		interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&clk_bus>;
		clock-names = "apb_pclk";
		clocks = <&clk_bus>, <&clk_bus>, <&clk_bus>;
		clock-names = "timer0clk", "timer1clk", "apb_pclk";
		};
		wdog: watchdog@fd200000 {
		compatible = "arm,sp805", "arm,primecell";

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