Commit c9487f03 authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'at91-ab-4.13-dt' of... 

Merge tag 'at91-ab-4.13-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux into next/dt

DT for 4.13

 - Switch to the new NAND binding
 - A few non urgent fixes

* tag 'at91-ab-4.13-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux

:
  ARM: dts: at91: sama5d2_xplained: remove wrong memory node
  ARM: dts: at91: sama5d2_xplained: add pwm controller
  ARM: dts: at91: Add the NOR flash available on sama5d3 dev kits
  ARM: dts: at91: Switch to the new NAND bindings
  ARM: dts: at91: Declare EBI/NAND controllers
  dt-bindings: mtd: atmel-nand: Document the nfc-io bindings
  ARM: dts: at91-sama5d4: use IRQ_TYPE_* to specify irq flags
  dts: gpio_atmel: adapt binding doc to reality
  ARM: dts: at91: sama5d2: add m_can nodes
  ARM: dts: at91: Add generic compatible string for I2C EEPROM

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents 1161a0d5 bc03ce08

Documentation/devicetree/bindings/gpio/gpio_atmel.txt

+8 −2
Original line number Diff line number Diff line
@@ -5,9 +5,13 @@ Required properties: 
- reg: Should contain GPIO controller registers location and length

- interrupts: Should be the port interrupt shared by all the pins.

- #gpio-cells: Should be two.  The first cell is the pin number and

  the second cell is used to specify optional parameters (currently

  unused).

  the second cell is used to specify optional parameters to declare if the GPIO

  is active high or low. See gpio.txt.

- gpio-controller: Marks the device node as a GPIO controller.

- interrupt-controller: Marks the device node as an interrupt controller.

- #interrupt-cells: Should be two. The first cell is the pin number and the

  second cell is used to specify irq type flags, see the two cell description

  in interrupt-controller/interrupts.txt for details.



optional properties:

- #gpio-lines: Number of gpio if absent 32.
@@ -21,5 +25,7 @@ Example: 
		#gpio-cells = <2>;

		gpio-controller;

		#gpio-lines = <19>;

		interrupt-controller;

		#interrupt-cells = <2>;

	};

Documentation/devicetree/bindings/mtd/atmel-nand.txt

+14 −0
Original line number Diff line number Diff line
@@ -59,8 +59,22 @@ Required properties: 
- reg: should contain 2 register ranges. The first one is pointing to the PMECC

       block, and the second one to the PMECC_ERRLOC block.



* SAMA5 NFC I/O bindings:



SAMA5 SoCs embed an advanced NAND controller logic to automate READ/WRITE page

operations. This interface to this logic is placed in a separate I/O range and

should thus have its own DT node.



- compatible: should be "atmel,sama5d3-nfc-io", "syscon".

- reg: should contain the I/O range used to interact with the NFC logic.



Example:



	nfc_io: nfc-io@70000000 {

		compatible = "atmel,sama5d3-nfc-io", "syscon";

		reg = <0x70000000 0x8000000>;

	};



	pmecc: ecc-engine@ffffc070 {

		compatible = "atmel,at91sam9g45-pmecc";

                reg = <0xffffc070 0x490>,

arch/arm/boot/dts/aks-cdu.dts

+30 −26
Original line number Diff line number Diff line
@@ -62,12 +62,10 @@ 
			status = "okay";

		};



		nand0: nand@40000000 {

			nand-bus-width = <8>;

			nand-ecc-mode = "soft";

			nand-on-flash-bbt;

			status = "okay";



		ebi: ebi@10000000 {

			nand_controller: nand-controller {

				nand: nand@3 {

					partitions {

						bootstrap@0 {

							label = "bootstrap";

							reg = <0x0 0x40000>;
@@ -77,20 +75,26 @@ 
							label = "uboot";

							reg = <0x40000 0x80000>;

						};



						ubootenv@c0000 {

							label = "ubootenv";

							reg = <0xc0000 0x40000>;

						};



						kernel@100000 {

							label = "kernel";

							reg = <0x100000 0x400000>;

						};



						rootfs@500000 {

							label = "rootfs";

							reg = <0x500000 0x7b00000>;

						};

					};

				};

			};

		};

	};



	leds {

		compatible = "gpio-leds";

arch/arm/boot/dts/animeo_ip.dts

+36 −17
Original line number Diff line number Diff line
@@ -83,11 +83,27 @@ 
			};

		};



		nand0: nand@40000000 {

		ebi: ebi@10000000 {

			status = "okay";



			nand_controller: nand-controller {

				status = "okay";

				pinctrl-0 = <&pinctrl_nand_cs &pinctrl_nand_rb>;

				pinctrl-names = "default";



				nand@3 {

					reg = <0x3 0x0 0x800000>;

					rb-gpios = <&pioC 13 GPIO_ACTIVE_HIGH>;

					cs-gpios = <&pioC 14 GPIO_ACTIVE_HIGH>;

					nand-bus-width = <8>;

					nand-ecc-mode = "soft";

					nand-on-flash-bbt;

			status = "okay";

					label = "atmel_nand";



					partitions {

						compatible = "fixed-partitions";

						#address-cells = <1>;

						#size-cells = <1>;



						barebox@0 {

							label = "barebox";
@@ -104,6 +120,9 @@ 
							reg = <0x60000 0x1FA0000>;

						};

					};

				};

			};

		};



		usb0: ohci@500000 {

			num-ports = <2>;

arch/arm/boot/dts/at91-cosino.dtsi

+53 −30
Original line number Diff line number Diff line
@@ -82,14 +82,34 @@ 
			};

		};



		nand0: nand@40000000 {

		ebi: ebi@10000000 {

			pinctrl-0 = <&pinctrl_ebi_addr_nand

				     &pinctrl_ebi_data_0_7>;

			pinctrl-names = "default";

			status = "okay";



			nand_controller: nand-controller {

				status = "okay";

				pinctrl-0 = <&pinctrl_nand_oe_we

					     &pinctrl_nand_cs

					     &pinctrl_nand_rb>;

				pinctrl-names = "default";



				nand@3 {

					reg = <0x3 0x0 0x800000>;

					rb-gpios = <&pioD 5 GPIO_ACTIVE_HIGH>;

					cs-gpios = <&pioD 4 GPIO_ACTIVE_HIGH>;

					nand-bus-width = <8>;

					nand-ecc-mode = "hw";

			atmel,has-pmecc;	/* Enable PMECC */

			atmel,pmecc-cap = <4>;

			atmel,pmecc-sector-size = <512>;

					nand-ecc-strength = <4>;

					nand-ecc-step-size = <512>;

					nand-on-flash-bbt;

			status = "okay";

					label = "atmel_nand";



					partitions {

						compatible = "fixed-partitions";

						#address-cells = <1>;

						#size-cells = <1>;



						at91bootstrap@0 {

							label = "at91bootstrap";
@@ -118,3 +138,6 @@ 
					};

				};

			};

		};

	};

};

CRA Git | Maintained and supported by SUSTech CRA and CCSE