ARM: add Cortex-R7 Processor Info (c90ad5c9) · Commits · 戴 / test

This patch adds processor info for ARM Ltd. Cortex-R7. The R7 has many similarities to the A9 and though the ACTLR layout is not identical, the bits associated with cache operations broadcasting and SMP modes are the same for A9, A5 and R7 (Though in the A-class processors the same bits toggle TLB-ops broadcasting as well as cache-ops) Signed-off-by:

Jonathan Austin <jonathan.austin@arm.com> Reviewed-by:

Will Deacon <will.deacon@arm.com> CC: Catalin Marinas <catalin.marinas@arm.com> CC: Stephen Boyd <sboyd@codeaurora.org>

arch/arm/mm/proc-v7.S

+12 −1

Original line number	Diff line number	Diff line
		@@ -159,7 +159,8 @@ ENDPROC(cpu_v7_do_resume)
		*/
		__v7_ca5mp_setup:
		__v7_ca9mp_setup:
		mov r10, #(1 << 0) @ TLB ops broadcasting
		__v7_cr7mp_setup:
		mov r10, #(1 << 0) @ Cache/TLB ops broadcasting
		b 1f
		__v7_ca7mp_setup:
		__v7_ca15mp_setup:
		@@ -418,6 +419,16 @@ __v7_pj4b_proc_info:
		__v7_proc __v7_pj4b_setup
		.size __v7_pj4b_proc_info, . - __v7_pj4b_proc_info

		/*
		* ARM Ltd. Cortex R7 processor.
		*/
		.type __v7_cr7mp_proc_info, #object
		__v7_cr7mp_proc_info:
		.long 0x410fc170
		.long 0xff0ffff0
		__v7_proc __v7_cr7mp_setup
		.size __v7_cr7mp_proc_info, . - __v7_cr7mp_proc_info

		/*
		* ARM Ltd. Cortex A7 processor.
		*/

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