Commit c8eee379 authored Feb 21, 2014 by Roland Dreier Committed by Jon Mason Apr 07, 2014

NTB: Fix typo in setting one translation register



In the code for Xeon devices in back-to-back mode with xeon_errata_workaround
disabled, the downstream device puts the wrong value in SNB_B2B_XLAT_OFFSETL
(SNB_MBAR01_DSD_ADDR vs. SNB_MBAR01_USD_ADDR).

This was spotted while reading code, since the typo has no practical effect,
at least for now: the low 32 bits of both constants are actually identical
anyway.  However, it's clearer and safer to use the right name.

Signed-off-by: Roland Dreier <roland@purestorage.com>
Signed-off-by: Jon Mason <jon.mason@intel.com>

parent e8bc2ebd

drivers/ntb/ntb_hw.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -785,7 +785,7 @@ static int ntb_xeon_setup(struct ntb_device *ndev)
		/* B2B_XLAT_OFFSET is a 64bit register, but can
		* only take 32bit writes
		*/
		writel(SNB_MBAR01_DSD_ADDR & 0xffffffff,
		writel(SNB_MBAR01_USD_ADDR & 0xffffffff,
		ndev->reg_base + SNB_B2B_XLAT_OFFSETL);
		writel(SNB_MBAR01_USD_ADDR >> 32,
		ndev->reg_base + SNB_B2B_XLAT_OFFSETU);

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