Commit c8be1a5f authored by Michal Wajdeczko's avatar Michal Wajdeczko Committed by Chris Wilson
Browse files

drm/i915/guc: Prefer intel_guc_is_submission_supported 



No need to use intel_uc_supports_guc_submission(uc) as we
can directly use intel_guc_is_submission_supported(guc)

Signed-off-by: default avatarMichal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20190804195052.31140-2-michal.wajdeczko@intel.com
parent ce52ad5d

drivers/gpu/drm/i915/gt/uc/intel_guc.c

+4 −4
Original line number Diff line number Diff line
@@ -145,7 +145,7 @@ static u32 guc_ctl_feature_flags(struct intel_guc *guc) 
{

	u32 flags = 0;



	if (!intel_uc_supports_guc_submission(&guc_to_gt(guc)->uc))

	if (!intel_guc_is_submission_supported(guc))

		flags |= GUC_CTL_DISABLE_SCHEDULER;



	return flags;
@@ -155,7 +155,7 @@ static u32 guc_ctl_ctxinfo_flags(struct intel_guc *guc) 
{

	u32 flags = 0;



	if (intel_uc_supports_guc_submission(&guc_to_gt(guc)->uc)) {

	if (intel_guc_is_submission_supported(guc)) {

		u32 ctxnum, base;



		base = intel_guc_ggtt_offset(guc, guc->stage_desc_pool);
@@ -291,7 +291,7 @@ int intel_guc_init(struct intel_guc *guc) 
	if (ret)

		goto err_ads;



	if (intel_uc_supports_guc_submission(&gt->uc)) {

	if (intel_guc_is_submission_supported(guc)) {

		/*

		 * This is stuff we need to have available at fw load time

		 * if we are planning to enable submission later
@@ -330,7 +330,7 @@ void intel_guc_fini(struct intel_guc *guc) 


	i915_ggtt_disable_guc(gt->ggtt);



	if (intel_uc_supports_guc_submission(&gt->uc))

	if (intel_guc_is_submission_supported(guc))

		intel_guc_submission_fini(guc);



	intel_guc_ct_fini(&guc->ct);

CRA Git | Maintained and supported by SUSTech CRA and CCSE