Commit c878eb62 authored by Oleksij Rempel's avatar Oleksij Rempel Committed by Olof Johansson
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ARM: dts: add DT for Alphascale ASM9260 SoC



for now it is wary basic SoC description with most important IPs needed
to make this device work

Signed-off-by: default avatarOleksij Rempel <linux@rempel-privat.de>
Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parent b7392d22
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@@ -555,7 +555,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt6589-aquaris5.dtb \
	mt6592-evb.dtb \
	mt8127-moose.dtb \
	mt8135-evbp1.dtb

dtb-$(CONFIG_MACH_ASM9260) += alphascale-asm9260-devkit.dtb
endif

always		:= $(dtb-y)
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/*
 * Copyright 2014 Oleksij Rempel <linux@rempel-privat.de>
 *
 * Licensed under the X11 license or the GPL v2 (or later)
 */

/dts-v1/;
#include "alphascale-asm9260.dtsi"

/ {
	model = "Alphascale asm9260 Development Kit";
	compatible = "alphascale,asm9260devkit", "alphascale,asm9260";
};
+63 −0
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/*
 * Copyright 2014 Oleksij Rempel <linux@rempel-privat.de>
 *
 * Licensed under the X11 license or the GPL v2 (or later)
 */

#include "skeleton.dtsi"
#include <dt-bindings/clock/alphascale,asm9260.h>

/ {
	interrupt-parent = <&icoll>;

	memory {
		device_type = "memory";
		reg = <0x20000000 0x2000000>;
	};

	cpus {
		#address-cells = <0>;
		#size-cells = <0>;

		cpu {
			compatible = "arm,arm926ej-s";
			device_type = "cpu";
			clocks = <&acc CLKID_SYS_CPU>;
		};
	};

	osc24m: oscillator {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <24000000>;
		clock-accuracy = <30000>;
	};

	soc {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "simple-bus";
		ranges;

		acc: clock-controller@80040000 {
			compatible = "alphascale,asm9260-clock-controller";
			#clock-cells = <1>;
			clocks = <&osc24m>;
			reg = <0x80040000 0x204>;
		};

		icoll: interrupt-controller@80054000 {
			compatible = "alphascale,asm9260-icoll";
			interrupt-controller;
			#interrupt-cells = <1>;
			reg = <0x80054000 0x200>;
		};

		timer0: timer@80088000 {
			compatible = "alphascale,asm9260-timer";
			reg = <0x80088000 0x4000>;
			clocks = <&acc CLKID_AHB_TIMER0>;
			interrupts = <29>;
		};
	};
};