drm/amdgpu: bind GTT on demand (c855e250) · Commits · 戴 / test

drivers/gpu/drm/amd/amdgpu/amdgpu.h

+1 −0

Original line number	Diff line number	Diff line
		@@ -2521,6 +2521,7 @@ static inline void amdgpu_acpi_fini(struct amdgpu_device *adev) { }
		struct amdgpu_bo_va_mapping *
		amdgpu_cs_find_mapping(struct amdgpu_cs_parser *parser,
		uint64_t addr, struct amdgpu_bo **bo);
		int amdgpu_cs_sysvm_access_required(struct amdgpu_cs_parser *parser);

		#include "amdgpu_object.h"
		#endif

+32 −2

Original line number	Diff line number	Diff line
		@@ -639,8 +639,12 @@ static int amdgpu_cs_parser_bos(struct amdgpu_cs_parser *p,
		}
		}

		if (p->uf_entry.robj)
		p->job->uf_addr += amdgpu_bo_gpu_offset(p->uf_entry.robj);
		if (!r && p->uf_entry.robj) {
		struct amdgpu_bo *uf = p->uf_entry.robj;

		r = amdgpu_ttm_bind(uf->tbo.ttm, &uf->tbo.mem);
		p->job->uf_addr += amdgpu_bo_gpu_offset(uf);
		}

		error_validate:
		if (r) {
		@@ -1163,3 +1167,29 @@ amdgpu_cs_find_mapping(struct amdgpu_cs_parser *parser,

		return NULL;
		}

		/**
		* amdgpu_cs_sysvm_access_required - make BOs accessible by the system VM
		*
		* @parser: command submission parser context
		*
		* Helper for UVD/VCE VM emulation, make sure BOs are accessible by the system VM.
		*/
		int amdgpu_cs_sysvm_access_required(struct amdgpu_cs_parser *parser)
		{
		unsigned i;
		int r;

		if (!parser->bo_list)
		return 0;

		for (i = 0; i < parser->bo_list->num_entries; i++) {
		struct amdgpu_bo *bo = parser->bo_list->array[i].robj;

		r = amdgpu_ttm_bind(bo->tbo.ttm, &bo->tbo.mem);
		if (unlikely(r))
		return r;
		}

		return 0;
		}

+7 −0

Original line number	Diff line number	Diff line
		@@ -675,6 +675,11 @@ int amdgpu_bo_pin_restricted(struct amdgpu_bo *bo, u32 domain,
		dev_err(bo->adev->dev, "%p pin failed\n", bo);
		goto error;
		}
		r = amdgpu_ttm_bind(bo->tbo.ttm, &bo->tbo.mem);
		if (unlikely(r)) {
		dev_err(bo->adev->dev, "%p bind failed\n", bo);
		goto error;
		}

		bo->pin_count = 1;
		if (gpu_addr != NULL)
		@@ -947,6 +952,8 @@ void amdgpu_bo_fence(struct amdgpu_bo bo, struct fence fence,
		u64 amdgpu_bo_gpu_offset(struct amdgpu_bo *bo)
		{
		WARN_ON_ONCE(bo->tbo.mem.mem_type == TTM_PL_SYSTEM);
		WARN_ON_ONCE(bo->tbo.mem.mem_type == TTM_PL_TT &&
		!amdgpu_ttm_is_bound(bo->tbo.ttm));
		WARN_ON_ONCE(!ww_mutex_is_locked(&bo->tbo.resv->lock) &&
		!bo->pin_count);

+30 −3

Original line number	Diff line number	Diff line
		@@ -256,8 +256,12 @@ static int amdgpu_move_blit(struct ttm_buffer_object *bo,
		new_start = new_mem->start << PAGE_SHIFT;

		switch (old_mem->mem_type) {
		case TTM_PL_VRAM:
		case TTM_PL_TT:
		r = amdgpu_ttm_bind(bo->ttm, old_mem);
		if (r)
		return r;

		case TTM_PL_VRAM:
		old_start += bo->bdev->man[old_mem->mem_type].gpu_offset;
		break;
		default:
		@@ -265,8 +269,12 @@ static int amdgpu_move_blit(struct ttm_buffer_object *bo,
		return -EINVAL;
		}
		switch (new_mem->mem_type) {
		case TTM_PL_VRAM:
		case TTM_PL_TT:
		r = amdgpu_ttm_bind(bo->ttm, new_mem);
		if (r)
		return r;

		case TTM_PL_VRAM:
		new_start += bo->bdev->man[new_mem->mem_type].gpu_offset;
		break;
		default:
		@@ -638,7 +646,6 @@ static int amdgpu_ttm_backend_bind(struct ttm_tt *ttm,
		struct ttm_mem_reg *bo_mem)
		{
		struct amdgpu_ttm_tt gtt = (void)ttm;
		uint32_t flags = amdgpu_ttm_tt_pte_flags(gtt->adev, ttm, bo_mem);
		int r;

		if (gtt->userptr) {
		@@ -659,6 +666,26 @@ static int amdgpu_ttm_backend_bind(struct ttm_tt *ttm,
		bo_mem->mem_type == AMDGPU_PL_OA)
		return -EINVAL;

		return 0;
		}

		bool amdgpu_ttm_is_bound(struct ttm_tt *ttm)
		{
		struct amdgpu_ttm_tt gtt = (void )ttm;

		return gtt && !list_empty(&gtt->list);
		}

		int amdgpu_ttm_bind(struct ttm_tt ttm, struct ttm_mem_reg bo_mem)
		{
		struct amdgpu_ttm_tt gtt = (void )ttm;
		uint32_t flags;
		int r;

		if (!ttm \|\| amdgpu_ttm_is_bound(ttm))
		return 0;

		flags = amdgpu_ttm_tt_pte_flags(gtt->adev, ttm, bo_mem);
		r = amdgpu_gart_bind(gtt->adev, gtt->offset, ttm->num_pages,
		ttm->pages, gtt->ttm.dma_address, flags);

+3 −0

Original line number	Diff line number	Diff line
		@@ -77,4 +77,7 @@ int amdgpu_fill_buffer(struct amdgpu_bo *bo,
		struct fence **fence);

		int amdgpu_mmap(struct file filp, struct vm_area_struct vma);
		bool amdgpu_ttm_is_bound(struct ttm_tt *ttm);
		int amdgpu_ttm_bind(struct ttm_tt ttm, struct ttm_mem_reg bo_mem);

		#endif