Commit c7e1d89b authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'samsung-soc64-4.6-2' of... 

Merge tag 'samsung-soc64-4.6-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/arm64

Samsung Exynos ARM64 improvements for v4.6:
1. Remove separate ARCH_EXYNOS7 symbol and consolidate it into
   one ARCH_EXYNOS.

This depends on clk tree: removal of last presence of ARCH_EXYNOS7.

* tag 'samsung-soc64-4.6-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux

:
  arm64: EXYNOS: Consolidate ARCH_EXYNOS7 symbol into ARCH_EXYNOS
  clk: samsung: Don't build ARMv8 clock drivers on ARMv7
  clk: samsung: Enable COMPILE_TEST for Samsung clocks
  clk: Move vendor's Kconfig into CCF menu section
  clk: mediatek: Fix memory leak on clock init fail
  clk: move the common clock's to_clk_*(_hw) macros to clk-provider.h
  clk: xgene: Remove return from void function
  clk: xgene: Add SoC and PMD PLL clocks with v2 hardware
  Documentation: Update APM X-Gene clock binding for v2 hardware
  clk: s2mps11: remove redundant code
  clk: s2mps11: remove redundant static variables declaration
  clk: s2mps11: allocate only one structure for clock init
  clk: s2mps11: merge two for loops in one
  clk-divider: make sure read-only dividers do not write to their register
  clk: tango4: rename ARCH_TANGOX to ARCH_TANGO
  clk: scpi: Fix checking return value of platform_device_register_simple()
  clk: mvebu: Mark ioremapped memory as __iomem

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents 2f85bb09 c87b3e97

Documentation/devicetree/bindings/clock/xgene.txt

+2 −0
Original line number Diff line number Diff line
@@ -9,6 +9,8 @@ Required properties: 
	"apm,xgene-socpll-clock" - for a X-Gene SoC PLL clock

	"apm,xgene-pcppll-clock" - for a X-Gene PCP PLL clock

	"apm,xgene-device-clock" - for a X-Gene device clock

	"apm,xgene-socpll-v2-clock" - for a X-Gene SoC PLL v2 clock

	"apm,xgene-pcppll-v2-clock" - for a X-Gene PCP PLL v2 clock



Required properties for SoC or PCP PLL clocks:

- reg : shall be the physical PLL register address for the pll clock.

arch/arm/mach-s3c24xx/Kconfig

+1 −0
Original line number Diff line number Diff line
@@ -15,6 +15,7 @@ config PLAT_S3C24XX 
	select NO_IOPORT_MAP

	select S3C_DEV_NAND

	select IRQ_DOMAIN

	select COMMON_CLK

	help

	  Base platform code for any Samsung S3C24XX device

arch/arm64/Kconfig.platforms

+2 −9
Original line number Diff line number Diff line
@@ -29,21 +29,14 @@ config ARCH_BERLIN 
	  This enables support for Marvell Berlin SoC Family



config ARCH_EXYNOS

	bool

	help

	  This enables support for Samsung Exynos SoC family



config ARCH_EXYNOS7

	bool "ARMv8 based Samsung Exynos7"

	select ARCH_EXYNOS

	bool "ARMv8 based Samsung Exynos SoC family"

	select COMMON_CLK_SAMSUNG

	select HAVE_S3C2410_WATCHDOG if WATCHDOG

	select HAVE_S3C_RTC if RTC_CLASS

	select PINCTRL

	select PINCTRL_EXYNOS



	help

	  This enables support for Samsung Exynos7 SoC family

	  This enables support for ARMv8 based Samsung Exynos SoC family.



config ARCH_LAYERSCAPE

	bool "ARMv8 based Freescale Layerscape SoC family"

arch/arm64/boot/dts/exynos/Makefile

+1 −1
Original line number Diff line number Diff line 
dtb-$(CONFIG_ARCH_EXYNOS7) += exynos7-espresso.dtb

dtb-$(CONFIG_ARCH_EXYNOS) += exynos7-espresso.dtb



always		:= $(dtb-y)

subdir-y	:= $(dts-dirs)

arch/arm64/configs/defconfig

+1 −1
Original line number Diff line number Diff line
@@ -34,7 +34,7 @@ CONFIG_ARCH_SUNXI=y 
CONFIG_ARCH_ALPINE=y

CONFIG_ARCH_BCM_IPROC=y

CONFIG_ARCH_BERLIN=y

CONFIG_ARCH_EXYNOS7=y

CONFIG_ARCH_EXYNOS=y

CONFIG_ARCH_LAYERSCAPE=y

CONFIG_ARCH_HISI=y

CONFIG_ARCH_MEDIATEK=y

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