Commit c7c85184 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'gpio/next' of git://git.secretlab.ca/git/linux-2.6 

* 'gpio/next' of git://git.secretlab.ca/git/linux-2.6: (61 commits)
  gpio/mxc/mxs: fix build error introduced by the irq_gc_ack() renaming
  mcp23s08: add i2c support
  mcp23s08: isolate spi specific parts
  mcp23s08: get rid of setup/teardown callbacks
  gpio/tegra: dt: add binding for gpio polarity
  mcp23s08: remove unused work queue
  gpio/da9052: remove a redundant assignment for gpio->da9052
  gpio/mxc: add device tree probe support
  ARM: mxc: use ARCH_NR_GPIOS to define gpio number
  gpio/mxc: get rid of the uses of cpu_is_mx()
  gpio/mxc: add missing initialization of basic_mmio_gpio shadow variables
  gpio: Move mpc5200 gpio driver to drivers/gpio
  GPIO: DA9052 GPIO module v3
  gpio/tegra: Use engineering names in DT compatible property
  of/gpio: Add new method for getting gpios under different property names
  gpio/dt: Refine GPIO device tree binding
  gpio/ml-ioh: fix off-by-one for displaying variable i in dev_err
  gpio/pca953x: Deprecate meaningless device-tree bindings
  gpio/pca953x: Remove dynamic platform data pointer
  gpio/pca953x: Fix IRQ support.
  ...
parents ece236ce 591567a5

Documentation/devicetree/bindings/gpio/fsl-imx-gpio.txt

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+22 −0
Original line number Diff line number Diff line 
* Freescale i.MX/MXC GPIO controller



Required properties:

- compatible : Should be "fsl,<soc>-gpio"

- reg : Address and length of the register set for the device

- interrupts : Should be the port interrupt shared by all 32 pins, if

  one number.  If two numbers, the first one is the interrupt shared

  by low 16 pins and the second one is for high 16 pins.

- gpio-controller : Marks the device node as a gpio controller.

- #gpio-cells : Should be two.  The first cell is the pin number and

  the second cell is used to specify optional parameters (currently

  unused).



Example:



gpio0: gpio@73f84000 {

	compatible = "fsl,imx51-gpio", "fsl,imx31-gpio";

	reg = <0x73f84000 0x4000>;

	interrupts = <50 51>;

	gpio-controller;

	#gpio-cells = <2>;

};

Documentation/devicetree/bindings/gpio/gpio.txt

+37 −9
Original line number Diff line number Diff line
@@ -4,17 +4,45 @@ Specifying GPIO information for devices 
1) gpios property

-----------------



Nodes that makes use of GPIOs should define them using `gpios' property,

format of which is: <&gpio-controller1-phandle gpio1-specifier

		     &gpio-controller2-phandle gpio2-specifier

		     0 /* holes are permitted, means no GPIO 3 */

		     &gpio-controller4-phandle gpio4-specifier

		     ...>;

Nodes that makes use of GPIOs should specify them using one or more

properties, each containing a 'gpio-list':



Note that gpio-specifier length is controller dependent.

	gpio-list ::= <single-gpio> [gpio-list]

	single-gpio ::= <gpio-phandle> <gpio-specifier>

	gpio-phandle : phandle to gpio controller node

	gpio-specifier : Array of #gpio-cells specifying specific gpio

			 (controller specific)



GPIO properties should be named "[<name>-]gpios".  Exact

meaning of each gpios property must be documented in the device tree

binding for each device.



For example, the following could be used to describe gpios pins to use

as chip select lines; with chip selects 0, 1 and 3 populated, and chip

select 2 left empty:



	gpio1: gpio1 {

		gpio-controller

		 #gpio-cells = <2>;

	};

	gpio2: gpio2 {

		gpio-controller

		 #gpio-cells = <1>;

	};

	[...]

	 chipsel-gpios = <&gpio1 12 0>,

			 <&gpio1 13 0>,

			 <0>, /* holes are permitted, means no GPIO 2 */

			 <&gpio2 2>;



Note that gpio-specifier length is controller dependent.  In the

above example, &gpio1 uses 2 cells to specify a gpio, while &gpio2

only uses one.



gpio-specifier may encode: bank, pin position inside the bank,

whether pin is open-drain and whether pin is logically inverted.

Exact meaning of each specifier cell is controller specific, and must

be documented in the device tree binding for the device.



Example of the node using GPIOs:
@@ -28,8 +56,8 @@ and empty GPIO flags as accepted by the "qe_pio_e" gpio-controller. 
2) gpio-controller nodes

------------------------



Every GPIO controller node must have #gpio-cells property defined,

this information will be used to translate gpio-specifiers.

Every GPIO controller node must both an empty "gpio-controller"

property, and have #gpio-cells contain the size of the gpio-specifier.



Example of two SOC GPIO banks defined as gpio-controller nodes:

Documentation/devicetree/bindings/gpio/gpio_nvidia.txt

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+8 −0
Original line number Diff line number Diff line 
NVIDIA Tegra 2 GPIO controller



Required properties:

- compatible : "nvidia,tegra20-gpio"

- #gpio-cells : Should be two. The first cell is the pin number and the

  second cell is used to specify optional parameters:

  - bit 0 specifies polarity (0 for normal, 1 for inverted)

- gpio-controller : Marks the device node as a GPIO controller.

arch/arm/mach-ep93xx/Makefile

+1 −1
Original line number Diff line number Diff line 
#

# Makefile for the linux kernel.

#

obj-y			:= core.o clock.o dma-m2p.o gpio.o

obj-y			:= core.o clock.o dma-m2p.o

obj-m			:=

obj-n			:=

obj-			:=

arch/arm/mach-ep93xx/core.c

+20 −7
Original line number Diff line number Diff line
@@ -174,14 +174,10 @@ struct sys_timer ep93xx_timer = { 
/*************************************************************************

 * EP93xx IRQ handling

 *************************************************************************/

extern void ep93xx_gpio_init_irq(void);



void __init ep93xx_init_irq(void)

{

	vic_init(EP93XX_VIC1_BASE, 0, EP93XX_VIC1_VALID_IRQ_MASK, 0);

	vic_init(EP93XX_VIC2_BASE, 32, EP93XX_VIC2_VALID_IRQ_MASK, 0);



	ep93xx_gpio_init_irq();

}
@@ -240,6 +236,24 @@ unsigned int ep93xx_chip_revision(void) 
	return v;

}



/*************************************************************************

 * EP93xx GPIO

 *************************************************************************/

static struct resource ep93xx_gpio_resource[] = {

	{

		.start		= EP93XX_GPIO_PHYS_BASE,

		.end		= EP93XX_GPIO_PHYS_BASE + 0xcc - 1,

		.flags		= IORESOURCE_MEM,

	},

};



static struct platform_device ep93xx_gpio_device = {

	.name		= "gpio-ep93xx",

	.id		= -1,

	.num_resources	= ARRAY_SIZE(ep93xx_gpio_resource),

	.resource	= ep93xx_gpio_resource,

};



/*************************************************************************

 * EP93xx peripheral handling

 *************************************************************************/
@@ -870,14 +884,13 @@ void __init ep93xx_register_ac97(void) 
	platform_device_register(&ep93xx_pcm_device);

}



extern void ep93xx_gpio_init(void);



void __init ep93xx_init_devices(void)

{

	/* Disallow access to MaverickCrunch initially */

	ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_CPENA);



	ep93xx_gpio_init();

	/* Get the GPIO working early, other devices need it */

	platform_device_register(&ep93xx_gpio_device);



	amba_device_register(&uart1_device, &iomem_resource);

	amba_device_register(&uart2_device, &iomem_resource);

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