drm/amd/display: add audio related regs (c7c7192c) · Commits · 戴 / test

drivers/gpu/drm/amd/display/dc/dce/dce_audio.c

+1 −3

Original line number	Diff line number	Diff line
		@@ -22,7 +22,7 @@
		* Authors: AMD
		*
		*/

		#include "../dc.h"
		#include "reg_helper.h"
		#include "dce_audio.h"
		#include "dce/dce_11_0_d.h"
		@@ -841,8 +841,6 @@ void dce_aud_wall_dto_setup(
		REG_UPDATE(DCCG_AUDIO_DTO_SOURCE,
		DCCG_AUDIO_DTO_SEL, 1);

		REG_UPDATE(DCCG_AUDIO_DTO_SOURCE,
		DCCG_AUDIO_DTO_SEL, 1);
		/* DCCG_AUDIO_DTO2_USE_512FBR_DTO, 1)
		* Select 512fs for DP TODO: web register definition
		* does not match register header file

+7 −0

Original line number	Diff line number	Diff line
		@@ -49,6 +49,8 @@
		SF(DCCG_AUDIO_DTO_SOURCE, DCCG_AUDIO_DTO0_SOURCE_SEL, mask_sh),\
		SF(DCCG_AUDIO_DTO_SOURCE, DCCG_AUDIO_DTO_SEL, mask_sh),\
		SF(DCCG_AUDIO_DTO_SOURCE, DCCG_AUDIO_DTO2_USE_512FBR_DTO, mask_sh),\
		SF(DCCG_AUDIO_DTO_SOURCE, DCCG_AUDIO_DTO0_USE_512FBR_DTO, mask_sh),\
		SF(DCCG_AUDIO_DTO_SOURCE, DCCG_AUDIO_DTO1_USE_512FBR_DTO, mask_sh),\
		SF(DCCG_AUDIO_DTO0_MODULE, DCCG_AUDIO_DTO0_MODULE, mask_sh),\
		SF(DCCG_AUDIO_DTO0_PHASE, DCCG_AUDIO_DTO0_PHASE, mask_sh),\
		SF(DCCG_AUDIO_DTO1_MODULE, DCCG_AUDIO_DTO1_MODULE, mask_sh),\
		@@ -95,6 +97,8 @@ struct dce_audio_shift {
		uint8_t DCCG_AUDIO_DTO1_MODULE;
		uint8_t DCCG_AUDIO_DTO1_PHASE;
		uint8_t DCCG_AUDIO_DTO2_USE_512FBR_DTO;
		uint32_t DCCG_AUDIO_DTO0_USE_512FBR_DTO;
		uint32_t DCCG_AUDIO_DTO1_USE_512FBR_DTO;
		};

		struct dce_aduio_mask {
		@@ -112,6 +116,9 @@ struct dce_aduio_mask {
		uint32_t DCCG_AUDIO_DTO1_MODULE;
		uint32_t DCCG_AUDIO_DTO1_PHASE;
		uint32_t DCCG_AUDIO_DTO2_USE_512FBR_DTO;
		uint32_t DCCG_AUDIO_DTO0_USE_512FBR_DTO;
		uint32_t DCCG_AUDIO_DTO1_USE_512FBR_DTO;

		};

		struct dce_audio {