Commit c7bb47aa authored by Linus Walleij's avatar Linus Walleij
Browse files

ARM: ux500: move AB8500 USB UICC settings to DT 



This moves the set-up of the USB UICC (InteChip USB) from the
board file to the device tree.

Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Lee Jones <lee.jones@linaro.org>
Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent b2985cf7

arch/arm/boot/dts/ste-href-ab8500.dtsi

+18 −1
Original line number Diff line number Diff line
@@ -34,7 +34,8 @@ 
						    <&gpio35_default_mode>,

						    <&ycbcr_default_mode>,

						    <&pwm_default_mode>,

						    <&adi1_default_mode>;

						    <&adi1_default_mode>,

						    <&usbuicc_default_mode>;



					/*

					 * Pins 2, 4, 10, 11, 12, 13, 16, 24, 25, 36, 37, 38, 39 and 42
@@ -301,6 +302,22 @@ 
							};

						};

					};

					/* This sets up the USB UICC pins */

					usbuicc {

						usbuicc_default_mode: usbuicc_default {

							default_mux {

								ste,function = "usbuicc";

								ste,pins = "usbuicc_d_1";

							};

							default_cfg {

								ste,pins = "GPIO21_H19",

									 "GPIO22_G20",

									 "GPIO23_G19";

								input-enable;

								bias-pull-down;

							};

						};

					};

				};

			};

		};

arch/arm/mach-ux500/board-mop500-pins.c

+0 −9
Original line number Diff line number Diff line
@@ -56,15 +56,6 @@ static struct pinctrl_map __initdata ab8500_pinmap[] = { 
	AB8500_MUX_STATE("gpio3_a_1", "gpio", "regulator.36", PINCTRL_STATE_SLEEP),

	AB8500_PIN_STATE("GPIO3_U9", in_pd, "regulator.36", PINCTRL_STATE_SLEEP),



	/*

	 * pins 21,22 and 23 are muxed in USB UICC

	 * configured in INPUT PULL DOWN

	 */

	AB8500_MUX_HOG("usbuicc_d_1", "usbuicc"),

	AB8500_PIN_HOG("GPIO21_H19", in_pd),

	AB8500_PIN_HOG("GPIO22_G20", in_pd),

	AB8500_PIN_HOG("GPIO23_G19", in_pd),



	/*

	 * pins 27,28 are muxed in DMIC12

	 * configured in INPUT PULL DOWN

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