Commit c7a19c79 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'for-linus' of git://git.infradead.org/users/vkoul/slave-dma 

Pull slave-dma updates from Vinod Koul:
 "Some notable changes are:
   - new driver for AMBA AXI NBPF by Guennadi
   - new driver for sun6i controller by Maxime
   - pl330 drivers fixes from Lar's
   - sh-dma updates and fixes from Laurent, Geert and Kuninori
   - Documentation updates from Geert
   - drivers fixes and updates spread over dw, edma, freescale, mpc512x
     etc.."

* 'for-linus' of git://git.infradead.org/users/vkoul/slave-dma: (72 commits)
  dmaengine: sun6i: depends on RESET_CONTROLLER
  dma: at_hdmac: fix invalid remaining bytes detection
  dmaengine: nbpfaxi: don't build this driver where it cannot be used
  dmaengine: nbpf_error_get_channel() can be static
  dma: pl08x: Use correct specifier for size_t values
  dmaengine: Remove the context argument to the prep_dma_cyclic operation
  dmaengine: nbpfaxi: convert to tasklet
  dmaengine: nbpfaxi: fix a theoretical race
  dmaengine: add a driver for AMBA AXI NBPF DMAC IP cores
  dmaengine: add device tree binding documentation for the nbpfaxi driver
  dmaengine: edma: Do not register second device when booted with DT
  dmaengine: edma: Do not change the error code returned from edma_alloc_slot
  dmaengine: rcar-dmac: Add device tree bindings documentation
  dmaengine: shdma: Allocate cyclic sg list dynamically
  dmaengine: shdma: Make channel filter ignore unrelated devices
  dmaengine: sh: Rework Kconfig and Makefile
  dmaengine: sun6i: Fix memory leaks
  dmaengine: sun6i: Free the interrupt before killing the tasklet
  dmaengine: sun6i: Remove switch statement from buswidth convertion routine
  dmaengine: of: kconfig: select DMA_ENGINE when DMA_OF is selected
  ...
parents 5fd41f2a a0bbe990

Documentation/devicetree/bindings/dma/fsl-imx-sdma.txt

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@@ -47,6 +47,7 @@ The full ID of peripheral types can be found below. 
	20	ASRC

	21	ESAI

	22	SSI Dual FIFO	(needs firmware ver >= 2)

	23	Shared ASRC



The third cell specifies the transfer priority as below.

Documentation/devicetree/bindings/dma/mpc512x-dma.txt

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* Freescale MPC512x and MPC8308 DMA Controller



The DMA controller in Freescale MPC512x and MPC8308 SoCs can move

blocks of memory contents between memory and peripherals or

from memory to memory.



Refer to "Generic DMA Controller and DMA request bindings" in

the dma/dma.txt file for a more detailed description of binding.



Required properties:

- compatible: should be "fsl,mpc5121-dma" or "fsl,mpc8308-dma";

- reg: should contain the DMA controller registers location and length;

- interrupt for the DMA controller: syntax of interrupt client node

	is described in interrupt-controller/interrupts.txt file.

- #dma-cells: the length of the DMA specifier, must be <1>.

	Each channel of this DMA controller has a peripheral request line,

	the assignment is fixed in hardware. This one cell

	in dmas property of a client device represents the channel number.



Example:



	dma0: dma@14000 {

		compatible = "fsl,mpc5121-dma";

		reg = <0x14000 0x1800>;

		interrupts = <65 0x8>;

		#dma-cells = <1>;

	};



DMA clients must use the format described in dma/dma.txt file.

Documentation/devicetree/bindings/dma/nbpfaxi.txt

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* Renesas "Type-AXI" NBPFAXI* DMA controllers



* DMA controller



Required properties



- compatible:	must be one of

		"renesas,nbpfaxi64dmac1b4"

		"renesas,nbpfaxi64dmac1b8"

		"renesas,nbpfaxi64dmac1b16"

		"renesas,nbpfaxi64dmac4b4"

		"renesas,nbpfaxi64dmac4b8"

		"renesas,nbpfaxi64dmac4b16"

		"renesas,nbpfaxi64dmac8b4"

		"renesas,nbpfaxi64dmac8b8"

		"renesas,nbpfaxi64dmac8b16"

- #dma-cells:	must be 2: the first integer is a terminal number, to which this

		slave is connected, the second one is flags. Flags is a bitmask

		with the following bits defined:



#define NBPF_SLAVE_RQ_HIGH	1

#define NBPF_SLAVE_RQ_LOW	2

#define NBPF_SLAVE_RQ_LEVEL	4



Optional properties:



You can use dma-channels and dma-requests as described in dma.txt, although they

won't be used, this information is derived from the compatibility string.



Example:



	dma: dma-controller@48000000 {

		compatible = "renesas,nbpfaxi64dmac8b4";

		reg = <0x48000000 0x400>;

		interrupts = <0 12 0x4

			      0 13 0x4

			      0 14 0x4

			      0 15 0x4

			      0 16 0x4

			      0 17 0x4

			      0 18 0x4

			      0 19 0x4>;

		#dma-cells = <2>;

		dma-channels = <8>;

		dma-requests = <8>;

	};



* DMA client



Required properties:



dmas and dma-names are required, as described in dma.txt.



Example:



#include <dt-bindings/dma/nbpfaxi.h>



...

		dmas = <&dma 0 (NBPF_SLAVE_RQ_HIGH | NBPF_SLAVE_RQ_LEVEL)

			&dma 1 (NBPF_SLAVE_RQ_HIGH | NBPF_SLAVE_RQ_LEVEL)>;

		dma-names = "rx", "tx";

Documentation/devicetree/bindings/dma/rcar-audmapp.txt

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* R-Car Audio DMAC peri peri Device Tree bindings



Required properties:

- compatible:	should be "renesas,rcar-audmapp"

- #dma-cells:	should be <1>, see "dmas" property below



Example:

	audmapp: audio-dma-pp@0xec740000 {

		compatible = "renesas,rcar-audmapp";

		#dma-cells = <1>;



		reg = <0 0xec740000 0 0x200>;

	};





* DMA client



Required properties:

- dmas:		a list of <[DMA multiplexer phandle] [SRS/DRS value]> pairs,

		where SRS/DRS values are fixed handles, specified in the SoC

		manual as the value that would be written into the PDMACHCR.

- dma-names:	a list of DMA channel names, one per "dmas" entry



Example:



	dmas = <&audmapp 0x2d00

		&audmapp 0x3700>;

	dma-names =  "src0_ssiu0",

		     "dvc0_ssiu0";

Documentation/devicetree/bindings/dma/renesas,rcar-dmac.txt

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* Renesas R-Car DMA Controller Device Tree bindings



Renesas R-Car Generation 2 SoCs have have multiple multi-channel DMA

controller instances named DMAC capable of serving multiple clients. Channels

can be dedicated to specific clients or shared between a large number of

clients.



DMA clients are connected to the DMAC ports referenced by an 8-bit identifier

called MID/RID.



Each DMA client is connected to one dedicated port of the DMAC, identified by

an 8-bit port number called the MID/RID. A DMA controller can thus serve up to

256 clients in total. When the number of hardware channels is lower than the

number of clients to be served, channels must be shared between multiple DMA

clients. The association of DMA clients to DMAC channels is fully dynamic and

not described in these device tree bindings.



Required Properties:



- compatible: must contain "renesas,rcar-dmac"



- reg: base address and length of the registers block for the DMAC



- interrupts: interrupt specifiers for the DMAC, one for each entry in

  interrupt-names.

- interrupt-names: one entry per channel, named "ch%u", where %u is the

  channel number ranging from zero to the number of channels minus one.



- clock-names: "fck" for the functional clock

- clocks: a list of phandle + clock-specifier pairs, one for each entry

  in clock-names.

- clock-names: must contain "fck" for the functional clock.



- #dma-cells: must be <1>, the cell specifies the MID/RID of the DMAC port

  connected to the DMA client

- dma-channels: number of DMA channels



Example: R8A7790 (R-Car H2) SYS-DMACs



	dmac0: dma-controller@e6700000 {

		compatible = "renesas,rcar-dmac";

		reg = <0 0xe6700000 0 0x20000>;

		interrupts = <0 197 IRQ_TYPE_LEVEL_HIGH

			      0 200 IRQ_TYPE_LEVEL_HIGH

			      0 201 IRQ_TYPE_LEVEL_HIGH

			      0 202 IRQ_TYPE_LEVEL_HIGH

			      0 203 IRQ_TYPE_LEVEL_HIGH

			      0 204 IRQ_TYPE_LEVEL_HIGH

			      0 205 IRQ_TYPE_LEVEL_HIGH

			      0 206 IRQ_TYPE_LEVEL_HIGH

			      0 207 IRQ_TYPE_LEVEL_HIGH

			      0 208 IRQ_TYPE_LEVEL_HIGH

			      0 209 IRQ_TYPE_LEVEL_HIGH

			      0 210 IRQ_TYPE_LEVEL_HIGH

			      0 211 IRQ_TYPE_LEVEL_HIGH

			      0 212 IRQ_TYPE_LEVEL_HIGH

			      0 213 IRQ_TYPE_LEVEL_HIGH

			      0 214 IRQ_TYPE_LEVEL_HIGH>;

		interrupt-names = "error",

				"ch0", "ch1", "ch2", "ch3",

				"ch4", "ch5", "ch6", "ch7",

				"ch8", "ch9", "ch10", "ch11",

				"ch12", "ch13", "ch14";

		clocks = <&mstp2_clks R8A7790_CLK_SYS_DMAC0>;

		clock-names = "fck";

		#dma-cells = <1>;

		dma-channels = <15>;

	};



	dmac1: dma-controller@e6720000 {

		compatible = "renesas,rcar-dmac";

		reg = <0 0xe6720000 0 0x20000>;

		interrupts = <0 220 IRQ_TYPE_LEVEL_HIGH

			      0 216 IRQ_TYPE_LEVEL_HIGH

			      0 217 IRQ_TYPE_LEVEL_HIGH

			      0 218 IRQ_TYPE_LEVEL_HIGH

			      0 219 IRQ_TYPE_LEVEL_HIGH

			      0 308 IRQ_TYPE_LEVEL_HIGH

			      0 309 IRQ_TYPE_LEVEL_HIGH

			      0 310 IRQ_TYPE_LEVEL_HIGH

			      0 311 IRQ_TYPE_LEVEL_HIGH

			      0 312 IRQ_TYPE_LEVEL_HIGH

			      0 313 IRQ_TYPE_LEVEL_HIGH

			      0 314 IRQ_TYPE_LEVEL_HIGH

			      0 315 IRQ_TYPE_LEVEL_HIGH

			      0 316 IRQ_TYPE_LEVEL_HIGH

			      0 317 IRQ_TYPE_LEVEL_HIGH

			      0 318 IRQ_TYPE_LEVEL_HIGH>;

		interrupt-names = "error",

				"ch0", "ch1", "ch2", "ch3",

				"ch4", "ch5", "ch6", "ch7",

				"ch8", "ch9", "ch10", "ch11",

				"ch12", "ch13", "ch14";

		clocks = <&mstp2_clks R8A7790_CLK_SYS_DMAC1>;

		clock-names = "fck";

		#dma-cells = <1>;

		dma-channels = <15>;

	};

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