dt-bindings: serial: lpuart: add ls1028a compatibility

    on Vybrid vf610 SoC with 8-bit register organization

  - "fsl,ls1021a-lpuart" for lpuart compatible with the one integrated

    on LS1021A SoC with 32-bit big-endian register organization

  - "fsl,ls1028a-lpuart" for lpuart compatible with the one integrated

    on LS1028A SoC with 32-bit little-endian register organization

  - "fsl,imx7ulp-lpuart" for lpuart compatible with the one integrated

    on i.MX7ULP SoC with 32-bit little-endian register organization

  - "fsl,imx8qxp-lpuart" for lpuart compatible with the one integrated

- reg : Address and length of the register set for the device

- interrupts : Should contain uart interrupt

- clocks : phandle + clock specifier pairs, one for each entry in clock-names

- clock-names : For vf610/ls1021a/imx7ulp, "ipg" clock is for uart bus/baud

  clock. For imx8qxp lpuart, "ipg" clock is bus clock that is used to access

  lpuart controller registers, it also requires "baud" clock for module to

  receive/transmit data.

- clock-names : For vf610/ls1021a/ls1028a/imx7ulp, "ipg" clock is for uart

  bus/baud clock. For imx8qxp lpuart, "ipg" clock is bus clock that is used

  to access lpuart controller registers, it also requires "baud" clock for

  module to receive/transmit data.

Optional properties:

- dmas: A list of two dma specifiers, one for each entry in dma-names.