Commit c7208de3 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'x86-cpu-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip 

* 'x86-cpu-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: (22 commits)
  x86: Fix code patching for paravirt-alternatives on 486
  x86, msr: change msr-reg.o to obj-y, and export its symbols
  x86: Use hard_smp_processor_id() to get apic id for AMD K8 cpus
  x86, sched: Workaround broken sched domain creation for AMD Magny-Cours
  x86, mcheck: Use correct cpumask for shared bank4
  x86, cacheinfo: Fixup L3 cache information for AMD multi-node processors
  x86: Fix CPU llc_shared_map information for AMD Magny-Cours
  x86, msr: Fix msr-reg.S compilation with gas 2.16.1, on 32-bit too
  x86: Move kernel_fpu_using to irq_fpu_usable in asm/i387.h
  x86, msr: fix msr-reg.S compilation with gas 2.16.1
  x86, msr: Export the register-setting MSR functions via /dev/*/msr
  x86, msr: Create _on_cpu helpers for {rw,wr}msr_safe_regs()
  x86, msr: Have the _safe MSR functions return -EIO, not -EFAULT
  x86, msr: CFI annotations, cleanups for msr-reg.S
  x86, asm: Make _ASM_EXTABLE() usable from assembly code
  x86, asm: Add 32-bit versions of the combined CFI macros
  x86, AMD: Disable wrongly set X86_FEATURE_LAHF_LM CPUID bit
  x86, msr: Rewrite AMD rd/wrmsr variants
  x86, msr: Add rd/wrmsr interfaces with preset registers
  x86: add specific support for Intel Atom architecture
  ...
parents 15b04042 5367b688

Documentation/ioctl/ioctl-number.txt

+1 −0
Original line number Diff line number Diff line
@@ -121,6 +121,7 @@ Code Seq# Include File Comments 
'c'	00-7F	linux/comstats.h	conflict!

'c'	00-7F	linux/coda.h		conflict!

'c'	80-9F	arch/s390/include/asm/chsc.h

'c'	A0-AF   arch/x86/include/asm/msr.h

'd'	00-FF	linux/char/drm/drm/h	conflict!

'd'	F0-FF	linux/digi1.h

'e'	all	linux/digi1.h		conflict!

arch/x86/Kconfig.cpu

+14 −5
Original line number Diff line number Diff line
@@ -262,6 +262,15 @@ config MCORE2 
	  family in /proc/cpuinfo. Newer ones have 6 and older ones 15

	  (not a typo)



config MATOM

	bool "Intel Atom"

	---help---



	  Select this for the Intel Atom platform. Intel Atom CPUs have an

	  in-order pipelining architecture and thus can benefit from

	  accordingly optimized code. Use a recent GCC with specific Atom

	  support in order to fully benefit from selecting this option.



config GENERIC_CPU

	bool "Generic-x86-64"

	depends on X86_64
@@ -295,7 +304,7 @@ config X86_CPU 
config X86_L1_CACHE_BYTES

	int

	default "128" if MPSC

	default "64" if GENERIC_CPU || MK8 || MCORE2 || X86_32

	default "64" if GENERIC_CPU || MK8 || MCORE2 || MATOM || X86_32



config X86_INTERNODE_CACHE_BYTES

	int
@@ -310,7 +319,7 @@ config X86_L1_CACHE_SHIFT 
	default "7" if MPENTIUM4 || MPSC

	default "4" if X86_ELAN || M486 || M386 || MGEODEGX1

	default "5" if MWINCHIP3D || MWINCHIPC6 || MCRUSOE || MEFFICEON || MCYRIXIII || MK6 || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || M586 || MVIAC3_2 || MGEODE_LX

	default "6" if MK7 || MK8 || MPENTIUMM || MCORE2 || MVIAC7 || X86_GENERIC || GENERIC_CPU

	default "6" if MK7 || MK8 || MPENTIUMM || MCORE2 || MATOM || MVIAC7 || X86_GENERIC || GENERIC_CPU



config X86_XADD

	def_bool y
@@ -359,7 +368,7 @@ config X86_INTEL_USERCOPY 


config X86_USE_PPRO_CHECKSUM

	def_bool y

	depends on MWINCHIP3D || MWINCHIPC6 || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MK8 || MVIAC3_2 || MEFFICEON || MGEODE_LX || MCORE2

	depends on MWINCHIP3D || MWINCHIPC6 || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MK8 || MVIAC3_2 || MEFFICEON || MGEODE_LX || MCORE2 || MATOM



config X86_USE_3DNOW

	def_bool y
@@ -387,7 +396,7 @@ config X86_P6_NOP 


config X86_TSC

	def_bool y

	depends on ((MWINCHIP3D || MCRUSOE || MEFFICEON || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || MK8 || MVIAC3_2 || MVIAC7 || MGEODEGX1 || MGEODE_LX || MCORE2) && !X86_NUMAQ) || X86_64

	depends on ((MWINCHIP3D || MCRUSOE || MEFFICEON || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || MK8 || MVIAC3_2 || MVIAC7 || MGEODEGX1 || MGEODE_LX || MCORE2 || MATOM) && !X86_NUMAQ) || X86_64



config X86_CMPXCHG64

	def_bool y
@@ -397,7 +406,7 @@ config X86_CMPXCHG64 
# generates cmov.

config X86_CMOV

	def_bool y

	depends on (MK8 || MK7 || MCORE2 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MVIAC3_2 || MVIAC7 || MCRUSOE || MEFFICEON || X86_64)

	depends on (MK8 || MK7 || MCORE2 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MVIAC3_2 || MVIAC7 || MCRUSOE || MEFFICEON || X86_64 || MATOM)



config X86_MINIMUM_CPU_FAMILY

	int

arch/x86/Makefile

+2 −0
Original line number Diff line number Diff line
@@ -55,6 +55,8 @@ else 


        cflags-$(CONFIG_MCORE2) += \

                $(call cc-option,-march=core2,$(call cc-option,-mtune=generic))

	cflags-$(CONFIG_MATOM) += $(call cc-option,-march=atom) \

		$(call cc-option,-mtune=atom,$(call cc-option,-mtune=generic))

        cflags-$(CONFIG_GENERIC_CPU) += $(call cc-option,-mtune=generic)

        KBUILD_CFLAGS += $(cflags-y)

arch/x86/Makefile_32.cpu

+2 −0
Original line number Diff line number Diff line
@@ -33,6 +33,8 @@ cflags-$(CONFIG_MCYRIXIII) += $(call cc-option,-march=c3,-march=i486) $(align)-f 
cflags-$(CONFIG_MVIAC3_2)	+= $(call cc-option,-march=c3-2,-march=i686)

cflags-$(CONFIG_MVIAC7)		+= -march=i686

cflags-$(CONFIG_MCORE2)		+= -march=i686 $(call tune,core2)

cflags-$(CONFIG_MATOM)		+= $(call cc-option,-march=atom,$(call cc-option,-march=core2,-march=i686)) \

	$(call cc-option,-mtune=atom,$(call cc-option,-mtune=generic))



# AMD Elan support

cflags-$(CONFIG_X86_ELAN)	+= -march=i486

arch/x86/crypto/aesni-intel_glue.c

+5 −12
Original line number Diff line number Diff line
@@ -59,13 +59,6 @@ asmlinkage void aesni_cbc_enc(struct crypto_aes_ctx *ctx, u8 *out, 
asmlinkage void aesni_cbc_dec(struct crypto_aes_ctx *ctx, u8 *out,

			      const u8 *in, unsigned int len, u8 *iv);



static inline int kernel_fpu_using(void)

{

	if (in_interrupt() && !(read_cr0() & X86_CR0_TS))

		return 1;

	return 0;

}



static inline struct crypto_aes_ctx *aes_ctx(void *raw_ctx)

{

	unsigned long addr = (unsigned long)raw_ctx;
@@ -89,7 +82,7 @@ static int aes_set_key_common(struct crypto_tfm *tfm, void *raw_ctx, 
		return -EINVAL;

	}



	if (kernel_fpu_using())

	if (irq_fpu_usable())

		err = crypto_aes_expand_key(ctx, in_key, key_len);

	else {

		kernel_fpu_begin();
@@ -110,7 +103,7 @@ static void aes_encrypt(struct crypto_tfm *tfm, u8 *dst, const u8 *src) 
{

	struct crypto_aes_ctx *ctx = aes_ctx(crypto_tfm_ctx(tfm));



	if (kernel_fpu_using())

	if (irq_fpu_usable())

		crypto_aes_encrypt_x86(ctx, dst, src);

	else {

		kernel_fpu_begin();
@@ -123,7 +116,7 @@ static void aes_decrypt(struct crypto_tfm *tfm, u8 *dst, const u8 *src) 
{

	struct crypto_aes_ctx *ctx = aes_ctx(crypto_tfm_ctx(tfm));



	if (kernel_fpu_using())

	if (irq_fpu_usable())

		crypto_aes_decrypt_x86(ctx, dst, src);

	else {

		kernel_fpu_begin();
@@ -349,7 +342,7 @@ static int ablk_encrypt(struct ablkcipher_request *req) 
	struct crypto_ablkcipher *tfm = crypto_ablkcipher_reqtfm(req);

	struct async_aes_ctx *ctx = crypto_ablkcipher_ctx(tfm);



	if (kernel_fpu_using()) {

	if (irq_fpu_usable()) {

		struct ablkcipher_request *cryptd_req =

			ablkcipher_request_ctx(req);

		memcpy(cryptd_req, req, sizeof(*req));
@@ -370,7 +363,7 @@ static int ablk_decrypt(struct ablkcipher_request *req) 
	struct crypto_ablkcipher *tfm = crypto_ablkcipher_reqtfm(req);

	struct async_aes_ctx *ctx = crypto_ablkcipher_ctx(tfm);



	if (kernel_fpu_using()) {

	if (irq_fpu_usable()) {

		struct ablkcipher_request *cryptd_req =

			ablkcipher_request_ctx(req);

		memcpy(cryptd_req, req, sizeof(*req));

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