Commit c707ffcf authored by Olof Johansson's avatar Olof Johansson Committed by Paul Mackerras
Browse files

[PATCH] ppc64: Updated Olof iommu updates 1/3 



Split out the implementation-specific parts of include/asm-ppc64/iommu.h
to separate include files (tce.h and dart.h respectively).

The generic iommu code really doesn't care about the underlying
implementation, and the TCE and DART stuff is completely different.

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: default avatarPaul Mackerras <paulus@samba.org>
parent a21ead32

arch/ppc64/kernel/iSeries_iommu.c

+1 −0
Original line number Diff line number Diff line
@@ -30,6 +30,7 @@ 
#include <linux/list.h>



#include <asm/iommu.h>

#include <asm/tce.h>

#include <asm/machdep.h>

#include <asm/iSeries/HvCallXm.h>

#include <asm/iSeries/iSeries_pci.h>

arch/ppc64/kernel/iSeries_vio.c

+1 −0
Original line number Diff line number Diff line
@@ -14,6 +14,7 @@ 


#include <asm/vio.h>

#include <asm/iommu.h>

#include <asm/tce.h>

#include <asm/abs_addr.h>

#include <asm/page.h>

#include <asm/iSeries/vio.h>

arch/ppc64/kernel/pSeries_iommu.c

+1 −0
Original line number Diff line number Diff line
@@ -46,6 +46,7 @@ 
#include <asm/pSeries_reconfig.h>

#include <asm/systemcfg.h>

#include <asm/firmware.h>

#include <asm/tce.h>

#include "pci.h"



#define DBG(fmt...)

arch/ppc64/kernel/pSeries_vio.c

+1 −0
Original line number Diff line number Diff line
@@ -22,6 +22,7 @@ 
#include <asm/prom.h>

#include <asm/vio.h>

#include <asm/hvcall.h>

#include <asm/tce.h>



extern struct subsystem devices_subsys; /* needed for vio_find_name() */

arch/ppc64/kernel/u3_iommu.c

+1 −28
Original line number Diff line number Diff line
@@ -44,39 +44,12 @@ 
#include <asm/abs_addr.h>

#include <asm/cacheflush.h>

#include <asm/lmb.h>

#include <asm/dart.h>



#include "pci.h"



extern int iommu_force_on;



/* physical base of DART registers */

#define DART_BASE        0xf8033000UL



/* Offset from base to control register */

#define DARTCNTL   0

/* Offset from base to exception register */

#define DARTEXCP   0x10

/* Offset from base to TLB tag registers */

#define DARTTAG    0x1000





/* Control Register fields */



/* base address of table (pfn) */

#define DARTCNTL_BASE_MASK    0xfffff

#define DARTCNTL_BASE_SHIFT   12



#define DARTCNTL_FLUSHTLB     0x400

#define DARTCNTL_ENABLE       0x200



/* size of table in pages */

#define DARTCNTL_SIZE_MASK    0x1ff

#define DARTCNTL_SIZE_SHIFT   0



/* DART table fields */

#define DARTMAP_VALID   0x80000000

#define DARTMAP_RPNMASK 0x00ffffff



/* Physical base address and size of the DART table */

unsigned long dart_tablebase; /* exported to htab_initialize */

static unsigned long dart_tablesize;

CRA Git | Maintained and supported by SUSTech CRA and CCSE