Merge branch 'drm-nouveau-next' of... (c706d7b9) · Commits · 戴 / test

drivers/gpu/drm/nouveau/nouveau_bios.c

+32 −1

Original line number	Diff line number	Diff line
		@@ -5186,7 +5186,7 @@ static int parse_bit_A_tbl_entry(struct drm_device dev, struct nvbios bios, st
		load_table_ptr = ROM16(bios->data[bitentry->offset]);

		if (load_table_ptr == 0x0) {
		NV_ERROR(dev, "Pointer to BIT loadval table invalid\n");
		NV_DEBUG(dev, "Pointer to BIT loadval table invalid\n");
		return -EINVAL;
		}

		@@ -6377,6 +6377,37 @@ apply_dcb_encoder_quirks(struct drm_device dev, int idx, u32 conn, u32 *conf)
		}
		}

		/* Some other twisted XFX board (rhbz#694914)
		*
		* The DVI/VGA encoder combo that's supposed to represent the
		* DVI-I connector actually point at two different ones, and
		* the HDMI connector ends up paired with the VGA instead.
		*
		* Connector table is missing anything for VGA at all, pointing it
		* an invalid conntab entry 2 so we figure it out ourself.
		*/
		if (nv_match_device(dev, 0x0615, 0x1682, 0x2605)) {
		if (idx == 0) {
		conn = 0x02002300; / VGA, connector 2 */
		*conf = 0x00000028;
		} else
		if (idx == 1) {
		conn = 0x01010312; / DVI, connector 0 */
		*conf = 0x00020030;
		} else
		if (idx == 2) {
		conn = 0x04020310; / VGA, connector 0 */
		*conf = 0x00000028;
		} else
		if (idx == 3) {
		conn = 0x02021322; / HDMI, connector 1 */
		*conf = 0x00020010;
		} else {
		conn = 0x0000000e; / EOL */
		*conf = 0x00000000;
		}
		}

		return true;
		}

drivers/gpu/drm/nouveau/nouveau_bo.c

+116 −116

Original line number	Diff line number	Diff line
		@@ -49,16 +49,12 @@ nouveau_bo_del_ttm(struct ttm_buffer_object *bo)
		DRM_ERROR("bo %p still attached to GEM object\n", bo);

		nv10_mem_put_tile_region(dev, nvbo->tile, NULL);
		if (nvbo->vma.node) {
		nouveau_vm_unmap(&nvbo->vma);
		nouveau_vm_put(&nvbo->vma);
		}
		kfree(nvbo);
		}

		static void
		nouveau_bo_fixup_align(struct nouveau_bo *nvbo, u32 flags,
		int align, int size, int *page_shift)
		int align, int size)
		{
		struct drm_nouveau_private *dev_priv = nouveau_bdev(nvbo->bo.bdev);

		@@ -82,67 +78,51 @@ nouveau_bo_fixup_align(struct nouveau_bo *nvbo, u32 flags,
		}
		}
		} else {
		if (likely(dev_priv->chan_vm)) {
		if (!(flags & TTM_PL_FLAG_TT) && size > 256 1024)
		*page_shift = dev_priv->chan_vm->lpg_shift;
		else
		*page_shift = dev_priv->chan_vm->spg_shift;
		} else {
		*page_shift = 12;
		}

		size = roundup(size, (1 << *page_shift));
		align = max((1 << page_shift), *align);
		size = roundup(size, (1 << nvbo->page_shift));
		align = max((1 << nvbo->page_shift), align);
		}

		size = roundup(size, PAGE_SIZE);
		}

		int
		nouveau_bo_new(struct drm_device dev, struct nouveau_channel chan,
		int size, int align, uint32_t flags, uint32_t tile_mode,
		uint32_t tile_flags, struct nouveau_bo **pnvbo)
		nouveau_bo_new(struct drm_device *dev, int size, int align,
		uint32_t flags, uint32_t tile_mode, uint32_t tile_flags,
		struct nouveau_bo **pnvbo)
		{
		struct drm_nouveau_private *dev_priv = dev->dev_private;
		struct nouveau_bo *nvbo;
		int ret = 0, page_shift = 0;
		int ret;

		nvbo = kzalloc(sizeof(struct nouveau_bo), GFP_KERNEL);
		if (!nvbo)
		return -ENOMEM;
		INIT_LIST_HEAD(&nvbo->head);
		INIT_LIST_HEAD(&nvbo->entry);
		INIT_LIST_HEAD(&nvbo->vma_list);
		nvbo->tile_mode = tile_mode;
		nvbo->tile_flags = tile_flags;
		nvbo->bo.bdev = &dev_priv->ttm.bdev;

		nouveau_bo_fixup_align(nvbo, flags, &align, &size, &page_shift);
		align >>= PAGE_SHIFT;

		if (dev_priv->chan_vm) {
		ret = nouveau_vm_get(dev_priv->chan_vm, size, page_shift,
		NV_MEM_ACCESS_RW, &nvbo->vma);
		if (ret) {
		kfree(nvbo);
		return ret;
		}
		nvbo->page_shift = 12;
		if (dev_priv->bar1_vm) {
		if (!(flags & TTM_PL_FLAG_TT) && size > 256 * 1024)
		nvbo->page_shift = dev_priv->bar1_vm->lpg_shift;
		}

		nouveau_bo_fixup_align(nvbo, flags, &align, &size);
		nvbo->bo.mem.num_pages = size >> PAGE_SHIFT;
		nouveau_bo_placement_set(nvbo, flags, 0);

		nvbo->channel = chan;
		ret = ttm_bo_init(&dev_priv->ttm.bdev, &nvbo->bo, size,
		ttm_bo_type_device, &nvbo->placement, align, 0,
		false, NULL, size, nouveau_bo_del_ttm);
		ttm_bo_type_device, &nvbo->placement,
		align >> PAGE_SHIFT, 0, false, NULL, size,
		nouveau_bo_del_ttm);
		if (ret) {
		/* ttm will call nouveau_bo_del_ttm if it fails.. */
		return ret;
		}
		nvbo->channel = NULL;

		if (nvbo->vma.node)
		nvbo->bo.offset = nvbo->vma.offset;
		*pnvbo = nvbo;
		return 0;
		}
		@@ -312,8 +292,6 @@ nouveau_bo_validate(struct nouveau_bo *nvbo, bool interruptible,
		if (ret)
		return ret;

		if (nvbo->vma.node)
		nvbo->bo.offset = nvbo->vma.offset;
		return 0;
		}

		@@ -440,7 +418,6 @@ nouveau_bo_init_mem_type(struct ttm_bo_device *bdev, uint32_t type,
		TTM_MEMTYPE_FLAG_CMA;
		man->available_caching = TTM_PL_MASK_CACHING;
		man->default_caching = TTM_PL_FLAG_CACHED;
		man->gpu_offset = dev_priv->gart_info.aper_base;
		break;
		default:
		NV_ERROR(dev, "Unknown GART type: %d\n",
		@@ -501,19 +478,12 @@ static int
		nvc0_bo_move_m2mf(struct nouveau_channel chan, struct ttm_buffer_object bo,
		struct ttm_mem_reg old_mem, struct ttm_mem_reg new_mem)
		{
		struct nouveau_mem *old_node = old_mem->mm_node;
		struct nouveau_mem *new_node = new_mem->mm_node;
		struct nouveau_bo *nvbo = nouveau_bo(bo);
		struct nouveau_mem *node = old_mem->mm_node;
		u64 src_offset = node->vma[0].offset;
		u64 dst_offset = node->vma[1].offset;
		u32 page_count = new_mem->num_pages;
		u64 src_offset, dst_offset;
		int ret;

		src_offset = old_node->tmp_vma.offset;
		if (new_node->tmp_vma.node)
		dst_offset = new_node->tmp_vma.offset;
		else
		dst_offset = nvbo->vma.offset;

		page_count = new_mem->num_pages;
		while (page_count) {
		int line_count = (page_count > 2047) ? 2047 : page_count;
		@@ -547,19 +517,13 @@ static int
		nv50_bo_move_m2mf(struct nouveau_channel chan, struct ttm_buffer_object bo,
		struct ttm_mem_reg old_mem, struct ttm_mem_reg new_mem)
		{
		struct nouveau_mem *old_node = old_mem->mm_node;
		struct nouveau_mem *new_node = new_mem->mm_node;
		struct nouveau_mem *node = old_mem->mm_node;
		struct nouveau_bo *nvbo = nouveau_bo(bo);
		u64 length = (new_mem->num_pages << PAGE_SHIFT);
		u64 src_offset, dst_offset;
		u64 src_offset = node->vma[0].offset;
		u64 dst_offset = node->vma[1].offset;
		int ret;

		src_offset = old_node->tmp_vma.offset;
		if (new_node->tmp_vma.node)
		dst_offset = new_node->tmp_vma.offset;
		else
		dst_offset = nvbo->vma.offset;

		while (length) {
		u32 amount, stride, height;

		@@ -694,6 +658,27 @@ nv04_bo_move_m2mf(struct nouveau_channel chan, struct ttm_buffer_object bo,
		return 0;
		}

		static int
		nouveau_vma_getmap(struct nouveau_channel chan, struct nouveau_bo nvbo,
		struct ttm_mem_reg mem, struct nouveau_vma vma)
		{
		struct nouveau_mem *node = mem->mm_node;
		int ret;

		ret = nouveau_vm_get(chan->vm, mem->num_pages << PAGE_SHIFT,
		node->page_shift, NV_MEM_ACCESS_RO, vma);
		if (ret)
		return ret;

		if (mem->mem_type == TTM_PL_VRAM)
		nouveau_vm_map(vma, node);
		else
		nouveau_vm_map_sg(vma, 0, mem->num_pages << PAGE_SHIFT,
		node, node->pages);

		return 0;
		}

		static int
		nouveau_bo_move_m2mf(struct ttm_buffer_object *bo, int evict, bool intr,
		bool no_wait_reserve, bool no_wait_gpu,
		@@ -711,31 +696,20 @@ nouveau_bo_move_m2mf(struct ttm_buffer_object *bo, int evict, bool intr,
		mutex_lock_nested(&chan->mutex, NOUVEAU_KCHANNEL_MUTEX);
		}

		/* create temporary vma for old memory, this will get cleaned
		* up after ttm destroys the ttm_mem_reg
		/* create temporary vmas for the transfer and attach them to the
		* old nouveau_mem node, these will get cleaned up after ttm has
		* destroyed the ttm_mem_reg
		*/
		if (dev_priv->card_type >= NV_50) {
		struct nouveau_mem *node = old_mem->mm_node;
		if (!node->tmp_vma.node) {
		u32 page_shift = nvbo->vma.node->type;
		if (old_mem->mem_type == TTM_PL_TT)
		page_shift = nvbo->vma.vm->spg_shift;

		ret = nouveau_vm_get(chan->vm,
		old_mem->num_pages << PAGE_SHIFT,
		page_shift, NV_MEM_ACCESS_RO,
		&node->tmp_vma);

		ret = nouveau_vma_getmap(chan, nvbo, old_mem, &node->vma[0]);
		if (ret)
		goto out;
		}

		if (old_mem->mem_type == TTM_PL_VRAM)
		nouveau_vm_map(&node->tmp_vma, node);
		else {
		nouveau_vm_map_sg(&node->tmp_vma, 0,
		old_mem->num_pages << PAGE_SHIFT,
		node, node->pages);
		}
		ret = nouveau_vma_getmap(chan, nvbo, new_mem, &node->vma[1]);
		if (ret)
		goto out;
		}

		if (dev_priv->card_type < NV_50)
		@@ -762,7 +736,6 @@ nouveau_bo_move_flipd(struct ttm_buffer_object *bo, bool evict, bool intr,
		bool no_wait_reserve, bool no_wait_gpu,
		struct ttm_mem_reg *new_mem)
		{
		struct drm_nouveau_private *dev_priv = nouveau_bdev(bo->bdev);
		u32 placement_memtype = TTM_PL_FLAG_TT \| TTM_PL_MASK_CACHING;
		struct ttm_placement placement;
		struct ttm_mem_reg tmp_mem;
		@@ -782,23 +755,7 @@ nouveau_bo_move_flipd(struct ttm_buffer_object *bo, bool evict, bool intr,
		if (ret)
		goto out;

		if (dev_priv->card_type >= NV_50) {
		struct nouveau_bo *nvbo = nouveau_bo(bo);
		struct nouveau_mem *node = tmp_mem.mm_node;
		struct nouveau_vma *vma = &nvbo->vma;
		if (vma->node->type != vma->vm->spg_shift)
		vma = &node->tmp_vma;
		nouveau_vm_map_sg(vma, 0, tmp_mem.num_pages << PAGE_SHIFT,
		node, node->pages);
		}

		ret = nouveau_bo_move_m2mf(bo, true, intr, no_wait_reserve, no_wait_gpu, &tmp_mem);

		if (dev_priv->card_type >= NV_50) {
		struct nouveau_bo *nvbo = nouveau_bo(bo);
		nouveau_vm_unmap(&nvbo->vma);
		}

		if (ret)
		goto out;

		@@ -844,30 +801,22 @@ out:
		static void
		nouveau_bo_move_ntfy(struct ttm_buffer_object bo, struct ttm_mem_reg new_mem)
		{
		struct drm_nouveau_private *dev_priv = nouveau_bdev(bo->bdev);
		struct nouveau_mem *node = new_mem->mm_node;
		struct nouveau_bo *nvbo = nouveau_bo(bo);
		struct nouveau_vma *vma = &nvbo->vma;
		struct nouveau_vm *vm = vma->vm;

		if (dev_priv->card_type < NV_50)
		return;

		switch (new_mem->mem_type) {
		case TTM_PL_VRAM:
		nouveau_vm_map(vma, node);
		break;
		case TTM_PL_TT:
		if (vma->node->type != vm->spg_shift) {
		struct nouveau_vma *vma;

		list_for_each_entry(vma, &nvbo->vma_list, head) {
		if (new_mem->mem_type == TTM_PL_VRAM) {
		nouveau_vm_map(vma, new_mem->mm_node);
		} else
		if (new_mem->mem_type == TTM_PL_TT &&
		nvbo->page_shift == vma->vm->spg_shift) {
		nouveau_vm_map_sg(vma, 0, new_mem->
		num_pages << PAGE_SHIFT,
		node, node->pages);
		} else {
		nouveau_vm_unmap(vma);
		vma = &node->tmp_vma;
		}
		nouveau_vm_map_sg(vma, 0, new_mem->num_pages << PAGE_SHIFT,
		node, node->pages);
		break;
		default:
		nouveau_vm_unmap(&nvbo->vma);
		break;
		}
		}

		@@ -1113,3 +1062,54 @@ struct ttm_bo_driver nouveau_bo_driver = {
		.io_mem_free = &nouveau_ttm_io_mem_free,
		};

		struct nouveau_vma *
		nouveau_bo_vma_find(struct nouveau_bo nvbo, struct nouveau_vm vm)
		{
		struct nouveau_vma *vma;
		list_for_each_entry(vma, &nvbo->vma_list, head) {
		if (vma->vm == vm)
		return vma;
		}

		return NULL;
		}

		int
		nouveau_bo_vma_add(struct nouveau_bo nvbo, struct nouveau_vm vm,
		struct nouveau_vma *vma)
		{
		const u32 size = nvbo->bo.mem.num_pages << PAGE_SHIFT;
		struct nouveau_mem *node = nvbo->bo.mem.mm_node;
		int ret;

		ret = nouveau_vm_get(vm, size, nvbo->page_shift,
		NV_MEM_ACCESS_RW, vma);
		if (ret)
		return ret;

		if (nvbo->bo.mem.mem_type == TTM_PL_VRAM)
		nouveau_vm_map(vma, nvbo->bo.mem.mm_node);
		else
		if (nvbo->bo.mem.mem_type == TTM_PL_TT)
		nouveau_vm_map_sg(vma, 0, size, node, node->pages);

		list_add_tail(&vma->head, &nvbo->vma_list);
		vma->refcount = 1;
		return 0;
		}

		void
		nouveau_bo_vma_del(struct nouveau_bo nvbo, struct nouveau_vma vma)
		{
		if (vma->node) {
		if (nvbo->bo.mem.mem_type != TTM_PL_SYSTEM) {
		spin_lock(&nvbo->bo.bdev->fence_lock);
		ttm_bo_wait(&nvbo->bo, false, false, false);
		spin_unlock(&nvbo->bo.bdev->fence_lock);
		nouveau_vm_unmap(vma);
		}

		nouveau_vm_put(vma);
		list_del(&vma->head);
		}
		}

drivers/gpu/drm/nouveau/nouveau_channel.c

+80 −87

Original line number	Diff line number	Diff line
		@@ -27,40 +27,63 @@
		#include "nouveau_drv.h"
		#include "nouveau_drm.h"
		#include "nouveau_dma.h"
		#include "nouveau_ramht.h"

		static int
		nouveau_channel_pushbuf_ctxdma_init(struct nouveau_channel *chan)
		nouveau_channel_pushbuf_init(struct nouveau_channel *chan)
		{
		u32 mem = nouveau_vram_pushbuf ? TTM_PL_FLAG_VRAM : TTM_PL_FLAG_TT;
		struct drm_device *dev = chan->dev;
		struct drm_nouveau_private *dev_priv = dev->dev_private;
		struct nouveau_bo *pb = chan->pushbuf_bo;
		struct nouveau_gpuobj *pushbuf = NULL;
		int ret = 0;
		int ret;

		/* allocate buffer object */
		ret = nouveau_bo_new(dev, 65536, 0, mem, 0, 0, &chan->pushbuf_bo);
		if (ret)
		goto out;

		ret = nouveau_bo_pin(chan->pushbuf_bo, mem);
		if (ret)
		goto out;

		ret = nouveau_bo_map(chan->pushbuf_bo);
		if (ret)
		goto out;

		/* create DMA object covering the entire memtype where the push
		* buffer resides, userspace can submit its own push buffers from
		* anywhere within the same memtype.
		*/
		chan->pushbuf_base = chan->pushbuf_bo->bo.offset;
		if (dev_priv->card_type >= NV_50) {
		ret = nouveau_bo_vma_add(chan->pushbuf_bo, chan->vm,
		&chan->pushbuf_vma);
		if (ret)
		goto out;

		if (dev_priv->card_type < NV_C0) {
		ret = nouveau_gpuobj_dma_new(chan,
		NV_CLASS_DMA_IN_MEMORY, 0,
		(1ULL << 40),
		NV_MEM_ACCESS_RO,
		NV_MEM_TARGET_VM,
		&pushbuf);
		&chan->pushbuf);
		}
		chan->pushbuf_base = pb->bo.offset;
		chan->pushbuf_base = chan->pushbuf_vma.offset;
		} else
		if (pb->bo.mem.mem_type == TTM_PL_TT) {
		if (chan->pushbuf_bo->bo.mem.mem_type == TTM_PL_TT) {
		ret = nouveau_gpuobj_dma_new(chan, NV_CLASS_DMA_IN_MEMORY, 0,
		dev_priv->gart_info.aper_size,
		NV_MEM_ACCESS_RO,
		NV_MEM_TARGET_GART, &pushbuf);
		chan->pushbuf_base = pb->bo.mem.start << PAGE_SHIFT;
		NV_MEM_TARGET_GART,
		&chan->pushbuf);
		} else
		if (dev_priv->card_type != NV_04) {
		ret = nouveau_gpuobj_dma_new(chan, NV_CLASS_DMA_IN_MEMORY, 0,
		dev_priv->fb_available_size,
		NV_MEM_ACCESS_RO,
		NV_MEM_TARGET_VRAM, &pushbuf);
		chan->pushbuf_base = pb->bo.mem.start << PAGE_SHIFT;
		NV_MEM_TARGET_VRAM,
		&chan->pushbuf);
		} else {
		/* NV04 cmdbuf hack, from original ddx.. not sure of it's
		* exact reason for existing :) PCI access to cmdbuf in
		@@ -70,47 +93,22 @@ nouveau_channel_pushbuf_ctxdma_init(struct nouveau_channel *chan)
		pci_resource_start(dev->pdev, 1),
		dev_priv->fb_available_size,
		NV_MEM_ACCESS_RO,
		NV_MEM_TARGET_PCI, &pushbuf);
		chan->pushbuf_base = pb->bo.mem.start << PAGE_SHIFT;
		}

		nouveau_gpuobj_ref(pushbuf, &chan->pushbuf);
		nouveau_gpuobj_ref(NULL, &pushbuf);
		return ret;
		NV_MEM_TARGET_PCI,
		&chan->pushbuf);
		}

		static struct nouveau_bo *
		nouveau_channel_user_pushbuf_alloc(struct drm_device *dev)
		{
		struct nouveau_bo *pushbuf = NULL;
		int location, ret;

		if (nouveau_vram_pushbuf)
		location = TTM_PL_FLAG_VRAM;
		else
		location = TTM_PL_FLAG_TT;

		ret = nouveau_bo_new(dev, NULL, 65536, 0, location, 0, 0x0000, &pushbuf);
		out:
		if (ret) {
		NV_ERROR(dev, "error allocating DMA push buffer: %d\n", ret);
		return NULL;
		}

		ret = nouveau_bo_pin(pushbuf, location);
		if (ret) {
		NV_ERROR(dev, "error pinning DMA push buffer: %d\n", ret);
		nouveau_bo_ref(NULL, &pushbuf);
		return NULL;
		NV_ERROR(dev, "error initialising pushbuf: %d\n", ret);
		nouveau_bo_vma_del(chan->pushbuf_bo, &chan->pushbuf_vma);
		nouveau_gpuobj_ref(NULL, &chan->pushbuf);
		if (chan->pushbuf_bo) {
		nouveau_bo_unmap(chan->pushbuf_bo);
		nouveau_bo_ref(NULL, &chan->pushbuf_bo);
		}

		ret = nouveau_bo_map(pushbuf);
		if (ret) {
		nouveau_bo_unpin(pushbuf);
		nouveau_bo_ref(NULL, &pushbuf);
		return NULL;
		}

		return pushbuf;
		return 0;
		}

		/* allocates and initializes a fifo for user space consumption */
		@@ -121,6 +119,7 @@ nouveau_channel_alloc(struct drm_device dev, struct nouveau_channel *chan_ret,
		{
		struct drm_nouveau_private *dev_priv = dev->dev_private;
		struct nouveau_fifo_engine *pfifo = &dev_priv->engine.fifo;
		struct nouveau_fpriv *fpriv = nouveau_fpriv(file_priv);
		struct nouveau_channel *chan;
		unsigned long flags;
		int ret;
		@@ -160,19 +159,14 @@ nouveau_channel_alloc(struct drm_device dev, struct nouveau_channel *chan_ret,
		INIT_LIST_HEAD(&chan->nvsw.flip);
		INIT_LIST_HEAD(&chan->fence.pending);

		/* Allocate DMA push buffer */
		chan->pushbuf_bo = nouveau_channel_user_pushbuf_alloc(dev);
		if (!chan->pushbuf_bo) {
		ret = -ENOMEM;
		NV_ERROR(dev, "pushbuf %d\n", ret);
		/* setup channel's memory and vm */
		ret = nouveau_gpuobj_channel_init(chan, vram_handle, gart_handle);
		if (ret) {
		NV_ERROR(dev, "gpuobj %d\n", ret);
		nouveau_channel_put(&chan);
		return ret;
		}

		nouveau_dma_pre_init(chan);
		chan->user_put = 0x40;
		chan->user_get = 0x44;

		/* Allocate space for per-channel fixed notifier memory */
		ret = nouveau_notifier_init_channel(chan);
		if (ret) {
		@@ -181,21 +175,17 @@ nouveau_channel_alloc(struct drm_device dev, struct nouveau_channel *chan_ret,
		return ret;
		}

		/* Setup channel's default objects */
		ret = nouveau_gpuobj_channel_init(chan, vram_handle, gart_handle);
		/* Allocate DMA push buffer */
		ret = nouveau_channel_pushbuf_init(chan);
		if (ret) {
		NV_ERROR(dev, "gpuobj %d\n", ret);
		NV_ERROR(dev, "pushbuf %d\n", ret);
		nouveau_channel_put(&chan);
		return ret;
		}

		/* Create a dma object for the push buffer */
		ret = nouveau_channel_pushbuf_ctxdma_init(chan);
		if (ret) {
		NV_ERROR(dev, "pbctxdma %d\n", ret);
		nouveau_channel_put(&chan);
		return ret;
		}
		nouveau_dma_pre_init(chan);
		chan->user_put = 0x40;
		chan->user_get = 0x44;

		/* disable the fifo caches */
		pfifo->reassign(dev, false);
		@@ -220,6 +210,11 @@ nouveau_channel_alloc(struct drm_device dev, struct nouveau_channel *chan_ret,
		nouveau_debugfs_channel_init(chan);

		NV_DEBUG(dev, "channel %d initialised\n", chan->id);
		if (fpriv) {
		spin_lock(&fpriv->lock);
		list_add(&chan->list, &fpriv->channels);
		spin_unlock(&fpriv->lock);
		}
		*chan_ret = chan;
		return 0;
		}
		@@ -236,30 +231,24 @@ nouveau_channel_get_unlocked(struct nouveau_channel *ref)
		}

		struct nouveau_channel *
		nouveau_channel_get(struct drm_device dev, struct drm_file file_priv, int id)
		nouveau_channel_get(struct drm_file *file_priv, int id)
		{
		struct drm_nouveau_private *dev_priv = dev->dev_private;
		struct nouveau_fpriv *fpriv = nouveau_fpriv(file_priv);
		struct nouveau_channel *chan;
		unsigned long flags;

		if (unlikely(id < 0 \|\| id >= NOUVEAU_MAX_CHANNEL_NR))
		return ERR_PTR(-EINVAL);

		spin_lock_irqsave(&dev_priv->channels.lock, flags);
		chan = nouveau_channel_get_unlocked(dev_priv->channels.ptr[id]);
		spin_unlock_irqrestore(&dev_priv->channels.lock, flags);

		if (unlikely(!chan))
		return ERR_PTR(-EINVAL);

		if (unlikely(file_priv && chan->file_priv != file_priv)) {
		nouveau_channel_put_unlocked(&chan);
		return ERR_PTR(-EINVAL);
		}

		spin_lock(&fpriv->lock);
		list_for_each_entry(chan, &fpriv->channels, list) {
		if (chan->id == id) {
		chan = nouveau_channel_get_unlocked(chan);
		spin_unlock(&fpriv->lock);
		mutex_lock(&chan->mutex);
		return chan;
		}
		}
		spin_unlock(&fpriv->lock);

		return ERR_PTR(-EINVAL);
		}

		void
		nouveau_channel_put_unlocked(struct nouveau_channel **pchan)
		@@ -312,12 +301,14 @@ nouveau_channel_put_unlocked(struct nouveau_channel **pchan)
		/* destroy any resources the channel owned */
		nouveau_gpuobj_ref(NULL, &chan->pushbuf);
		if (chan->pushbuf_bo) {
		nouveau_bo_vma_del(chan->pushbuf_bo, &chan->pushbuf_vma);
		nouveau_bo_unmap(chan->pushbuf_bo);
		nouveau_bo_unpin(chan->pushbuf_bo);
		nouveau_bo_ref(NULL, &chan->pushbuf_bo);
		}
		nouveau_gpuobj_channel_takedown(chan);
		nouveau_ramht_ref(NULL, &chan->ramht, chan);
		nouveau_notifier_takedown_channel(chan);
		nouveau_gpuobj_channel_takedown(chan);

		nouveau_channel_ref(NULL, pchan);
		}
		@@ -383,10 +374,11 @@ nouveau_channel_cleanup(struct drm_device dev, struct drm_file file_priv)

		NV_DEBUG(dev, "clearing FIFO enables from file_priv\n");
		for (i = 0; i < engine->fifo.channels; i++) {
		chan = nouveau_channel_get(dev, file_priv, i);
		chan = nouveau_channel_get(file_priv, i);
		if (IS_ERR(chan))
		continue;

		list_del(&chan->list);
		atomic_dec(&chan->users);
		nouveau_channel_put(&chan);
		}
		@@ -459,10 +451,11 @@ nouveau_ioctl_fifo_free(struct drm_device dev, void data,
		struct drm_nouveau_channel_free *req = data;
		struct nouveau_channel *chan;

		chan = nouveau_channel_get(dev, file_priv, req->channel);
		chan = nouveau_channel_get(file_priv, req->channel);
		if (IS_ERR(chan))
		return PTR_ERR(chan);

		list_del(&chan->list);
		atomic_dec(&chan->users);
		nouveau_channel_put(&chan);
		return 0;

drivers/gpu/drm/nouveau/nouveau_dma.c

+6 −1

Original line number	Diff line number	Diff line
		@@ -167,8 +167,13 @@ nv50_dma_push(struct nouveau_channel chan, struct nouveau_bo bo,
		int delta, int length)
		{
		struct nouveau_bo *pb = chan->pushbuf_bo;
		uint64_t offset = bo->bo.offset + delta;
		struct nouveau_vma *vma;
		int ip = (chan->dma.ib_put * 2) + chan->dma.ib_base;
		u64 offset;

		vma = nouveau_bo_vma_find(bo, chan->vm);
		BUG_ON(!vma);
		offset = vma->offset + delta;

		BUG_ON(chan->dma.ib_free < 1);
		nouveau_bo_wr32(pb, ip++, lower_32_bits(offset));

drivers/gpu/drm/nouveau/nouveau_drv.c

+10 −2

Original line number	Diff line number	Diff line
		@@ -73,7 +73,7 @@ int nouveau_ignorelid = 0;
		module_param_named(ignorelid, nouveau_ignorelid, int, 0400);

		MODULE_PARM_DESC(noaccel, "Disable all acceleration");
		int nouveau_noaccel = 0;
		int nouveau_noaccel = -1;
		module_param_named(noaccel, nouveau_noaccel, int, 0400);

		MODULE_PARM_DESC(nofbaccel, "Disable fbcon acceleration");
		@@ -119,6 +119,10 @@ MODULE_PARM_DESC(msi, "Enable MSI (default: off)\n");
		int nouveau_msi;
		module_param_named(msi, nouveau_msi, int, 0400);

		MODULE_PARM_DESC(ctxfw, "Use external HUB/GPC ucode (fermi)\n");
		int nouveau_ctxfw;
		module_param_named(ctxfw, nouveau_ctxfw, int, 0400);

		int nouveau_fbpercrtc;
		#if 0
		module_param_named(fbpercrtc, nouveau_fbpercrtc, int, 0400);
		@@ -354,7 +358,7 @@ nouveau_pci_resume(struct pci_dev *pdev)

		list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
		struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
		u32 offset = nv_crtc->cursor.nvbo->bo.mem.start << PAGE_SHIFT;
		u32 offset = nv_crtc->cursor.nvbo->bo.offset;

		nv_crtc->cursor.set_offset(nv_crtc, offset);
		nv_crtc->cursor.set_pos(nv_crtc, nv_crtc->cursor_saved_x,
		@@ -389,7 +393,9 @@ static struct drm_driver driver = {
		.firstopen = nouveau_firstopen,
		.lastclose = nouveau_lastclose,
		.unload = nouveau_unload,
		.open = nouveau_open,
		.preclose = nouveau_preclose,
		.postclose = nouveau_postclose,
		#if defined(CONFIG_DRM_NOUVEAU_DEBUG)
		.debugfs_init = nouveau_debugfs_init,
		.debugfs_cleanup = nouveau_debugfs_takedown,
		@@ -420,6 +426,8 @@ static struct drm_driver driver = {

		.gem_init_object = nouveau_gem_object_new,
		.gem_free_object = nouveau_gem_object_del,
		.gem_open_object = nouveau_gem_object_open,
		.gem_close_object = nouveau_gem_object_close,

		.name = DRIVER_NAME,
		.desc = DRIVER_DESC,

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