Commit c6e2e454 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'qcom-arm64-for-5.9' of... 

Merge tag 'qcom-arm64-for-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt

Qualcomm ARM64 DT updates for v5.9

For SM8250 this adds the main pinctrl/gpio block (TLMM), I2C and SPI
controllers, the CPU subsytem watchdog, inter-processor signalling
controller (IPCC), always-on power/clock controller (AOSS),
inter-processor state machine (SMP2P), defines remoteproc controls
for audio, compute and sensor processors and base definition for the
PM8009 PMIC. It also does fix up a few minor issues from the initial
merge of the platform support.

SC7180 and SDM845 gains interconnect paths and performance tables
defined for display, QUP, QSPI, SDHC and CPUs.

SC7180 gains WiFi support and some cleanups related to the modem
remoteproc.

SDM845 gains inline crypto engine support for UFS, LAB/IBB
regulators for powering display panels, remoteproc relocation debug
support

SM8150 gains USB controller support and the two related PHYs, as well as
thermal zones and throttling support.

IPQ8074 gains USB and SDHCI support.

MSM8916 is being cleaned up, gains interconnect providers and Samsung
A2015 gains accelerometer and magnetometer support.

MSM8994 gains PSCI, SDHCI, SPMI support, I2C, SPI, UART gains DMA
support and the DTS files are cleaned up.

The SDM630 platform DTS is at last merged and initial support for Sony
Xperia 10, 10 Plus, XA2, XA2 Plus and XA2 Ultra is added.

* tag 'qcom-arm64-for-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (66 commits)
  arm64: dts: qcom: pmi8998: Add nodes for LAB and IBB regulators
  arm64: dts: sc7180: Add DSI and MDP OPP tables and power-domains
  arm64: dts: sdm845: Add DSI and MDP OPP tables and power-domains
  arm64: dts: qcom: sc7180: Move the fixed-perm property to SoC dtsi
  arm64: dts: qcom: msm8916-samsung-a2015: Add accelerometer/magnetometer
  arm64: dts: qcom: msm8916: Use higher I2C drive-strength only on DB410c
  arm64: dts: qcom: msm8916: Simplify pinctrl configuration
  arm64: dts: msm8916-samsung/longcheer: Move pinctrl/regulators to end of file
  arm64: dts: qcom: sm8250: Drop tcsr_mutex syscon
  arm64: dts: qcom: sc7180: Add missing properties for Wifi node
  arm64: dts: qcom: Fix WiFi supplies on sc7180-idp
  arm64: dts: sdm845: add Inline Crypto Engine registers and clock
  arm64: dts: sc7180: Add sdhc opps and power-domains
  arm64: dts: sdm845: Add sdhc opps and power-domains
  arm64: dts: sc7180: Add OPP table for all qup devices
  arm64: dts: sdm845: Add OPP table for all qup devices
  arm64: dts: sc7180: Add qspi opps and power-domains
  arm64: dts: sdm845: Add qspi opps and power-domains
  arm64: dts: qcom: sdm845: Add cpu OPP tables
  arm64: dts: qcom: sc7180: Drop the unused non-MSA SID
  ...

Link: https://lore.kernel.org/r/20200721044934.3430084-1-bjorn.andersson@linaro.org


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 01407153 208921ba

Documentation/devicetree/bindings/thermal/qcom-tsens.yaml

+2 −0
Original line number Diff line number Diff line
@@ -40,6 +40,8 @@ properties: 
              - qcom,msm8998-tsens

              - qcom,sc7180-tsens

              - qcom,sdm845-tsens

              - qcom,sm8150-tsens

              - qcom,sm8250-tsens

          - const: qcom,tsens-v2



  reg:

arch/arm64/boot/dts/qcom/Makefile

+5 −0
Original line number Diff line number Diff line
@@ -16,6 +16,11 @@ dtb-$(CONFIG_ARCH_QCOM) += msm8998-hp-envy-x2.dtb 
dtb-$(CONFIG_ARCH_QCOM)	+= msm8998-lenovo-miix-630.dtb

dtb-$(CONFIG_ARCH_QCOM)	+= msm8998-mtp.dtb

dtb-$(CONFIG_ARCH_QCOM)	+= sc7180-idp.dtb

dtb-$(CONFIG_ARCH_QCOM)	+= sdm630-sony-xperia-ganges-kirin.dtb

dtb-$(CONFIG_ARCH_QCOM)	+= sdm630-sony-xperia-nile-discovery.dtb

dtb-$(CONFIG_ARCH_QCOM)	+= sdm630-sony-xperia-nile-pioneer.dtb

dtb-$(CONFIG_ARCH_QCOM)	+= sdm630-sony-xperia-nile-voyager.dtb

dtb-$(CONFIG_ARCH_QCOM)	+= sdm636-sony-xperia-ganges-mermaid.dtb

dtb-$(CONFIG_ARCH_QCOM)	+= sdm660-xiaomi-lavender.dtb

dtb-$(CONFIG_ARCH_QCOM)	+= sdm845-cheza-r1.dtb

dtb-$(CONFIG_ARCH_QCOM)	+= sdm845-cheza-r2.dtb

arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi

+123 −139
Original line number Diff line number Diff line
@@ -466,9 +466,10 @@ 
			qcom,audio-routing =

				"AMIC2", "MIC BIAS Internal2",

				"AMIC3", "MIC BIAS External1";



			external-dai-link@0 {

				link-name = "ADV7533";

				cpu { /* QUAT */

				cpu {

					sound-dai = <&lpass MI2S_QUATERNARY>;

				};

				codec {
@@ -476,9 +477,9 @@ 
				};

			};



                        internal-codec-playback-dai-link@0 {            /* I2S - Internal codec */

			internal-codec-playback-dai-link@0 {

				link-name = "WCD";

                                cpu { /* PRIMARY */

				cpu {

					sound-dai = <&lpass MI2S_PRIMARY>;

				};

				codec {
@@ -486,9 +487,9 @@ 
				};

			};



                        internal-codec-capture-dai-link@0 {             /* I2S - Internal codec */

			internal-codec-capture-dai-link@0 {

				link-name = "WCD-Capture";

                                cpu { /* PRIMARY */

				cpu {

					sound-dai = <&lpass MI2S_TERTIARY>;

				};

				codec {
@@ -778,156 +779,139 @@ 
	};

};



/*

 * 2mA drive strength is not enough when connecting multiple

 * I2C devices with different pull up resistors.

 */

&i2c2_default {

	drive-strength = <16>;

};



&i2c4_default {

	drive-strength = <16>;

};



&i2c6_default {

	drive-strength = <16>;

};



&msmgpio {

	msmgpio_leds: msmgpio-leds {

		pinconf {

		pins = "gpio21", "gpio120";

		function = "gpio";



		output-low;

	};

	};



	usb_id_default: usb-id-default {

		pinmux {

			function = "gpio";

		pins = "gpio121";

		};

		function = "gpio";



		pinconf {

			pins = "gpio121";

		drive-strength = <8>;

		input-enable;

		bias-pull-up;

	};

	};



	adv7533_int_active: adv533-int-active {

		pinmux {

			function = "gpio";

			pins = "gpio31";

		};

		pinconf {

		pins = "gpio31";

		function = "gpio";



		drive-strength = <16>;

		bias-disable;

	};

	};



	adv7533_int_suspend: adv7533-int-suspend {

		pinmux {

			function = "gpio";

			pins = "gpio31";

		};

		pinconf {

		pins = "gpio31";

		function = "gpio";



		drive-strength = <2>;

		bias-disable;

	};

	};



	adv7533_switch_active: adv7533-switch-active {

		pinmux {

			function = "gpio";

			pins = "gpio32";

		};

		pinconf {

		pins = "gpio32";

		function = "gpio";



		drive-strength = <16>;

		bias-disable;

	};

	};



	adv7533_switch_suspend: adv7533-switch-suspend {

		pinmux {

			function = "gpio";

			pins = "gpio32";

		};

		pinconf {

		pins = "gpio32";

		function = "gpio";



		drive-strength = <2>;

		bias-disable;

	};

	};



	msm_key_volp_n_default: msm-key-volp-n-default {

		pinmux {

			function = "gpio";

			pins = "gpio107";

		};

		pinconf {

		pins = "gpio107";

		function = "gpio";



		drive-strength = <8>;

		input-enable;

		bias-pull-up;

	};

};

};



&pm8916_gpios {

	usb_hub_reset_pm: usb-hub-reset-pm {

		pinconf {

		pins = "gpio3";

		function = PMIC_GPIO_FUNC_NORMAL;



		input-disable;

		output-high;

	};

	};



	usb_hub_reset_pm_device: usb-hub-reset-pm-device {

		pinconf {

		pins = "gpio3";

		function = PMIC_GPIO_FUNC_NORMAL;



		output-low;

	};

	};



	usb_sw_sel_pm: usb-sw-sel-pm {

		pinconf {

		pins = "gpio4";

		function = PMIC_GPIO_FUNC_NORMAL;



		power-source = <PM8916_GPIO_VPH>;

		input-disable;

		output-high;

	};

	};



	usb_sw_sel_pm_device: usb-sw-sel-pm-device {

		pinconf {

		pins = "gpio4";

		function = PMIC_GPIO_FUNC_NORMAL;



		power-source = <PM8916_GPIO_VPH>;

		input-disable;

		output-low;

	};

	};



	pm8916_gpios_leds: pm8916-gpios-leds {

		pinconf {

		pins = "gpio1", "gpio2";

		function = PMIC_GPIO_FUNC_NORMAL;



		output-low;

	};

};

};



&pm8916_mpps {

	pinctrl-names = "default";

	pinctrl-0 = <&ls_exp_gpio_f>;



	ls_exp_gpio_f: pm8916-mpp4 {

		pinconf {

		pins = "mpp4";

		function = "digital";



		output-low;

		power-source = <PM8916_MPP_L5>;	// 1.8V

	};

	};



	pm8916_mpps_leds: pm8916-mpps-leds {

		pinconf {

		pins = "mpp2", "mpp3";

		function = "digital";



		output-low;

	};

};
 
};

arch/arm64/boot/dts/qcom/ipq8074-hk01.dts

+28 −0
Original line number Diff line number Diff line
@@ -82,3 +82,31 @@ 
		nand-bus-width = <8>;

	};

};



&sdhc_1 {

	status = "ok";

};



&qusb_phy_0 {

	status = "ok";

};



&qusb_phy_1 {

	status = "ok";

};



&ssphy_0 {

	status = "ok";

};



&ssphy_1 {

	status = "ok";

};



&usb_0 {

	status = "ok";

};



&usb_1 {

	status = "ok";

};

arch/arm64/boot/dts/qcom/ipq8074.dtsi

+189 −0
Original line number Diff line number Diff line
@@ -82,6 +82,91 @@ 
		ranges = <0 0 0 0xffffffff>;

		compatible = "simple-bus";



		ssphy_1: phy@58000 {

			compatible = "qcom,ipq8074-qmp-usb3-phy";

			reg = <0x00058000 0x1c4>;

			#clock-cells = <1>;

			#address-cells = <1>;

			#size-cells = <1>;

			ranges;



			clocks = <&gcc GCC_USB1_AUX_CLK>,

				<&gcc GCC_USB1_PHY_CFG_AHB_CLK>,

				<&xo>;

			clock-names = "aux", "cfg_ahb", "ref";



			resets =  <&gcc GCC_USB1_PHY_BCR>,

				<&gcc GCC_USB3PHY_1_PHY_BCR>;

			reset-names = "phy","common";

			status = "disabled";



			usb1_ssphy: lane@58200 {

				reg = <0x00058200 0x130>,       /* Tx */

				      <0x00058400 0x200>,     /* Rx */

				      <0x00058800 0x1f8>,     /* PCS  */

				      <0x00058600 0x044>;     /* PCS misc*/

				#phy-cells = <0>;

				clocks = <&gcc GCC_USB1_PIPE_CLK>;

				clock-names = "pipe0";

				clock-output-names = "gcc_usb1_pipe_clk_src";

			};

		};



		qusb_phy_1: phy@59000 {

			compatible = "qcom,ipq8074-qusb2-phy";

			reg = <0x00059000 0x180>;

			#phy-cells = <0>;



			clocks = <&gcc GCC_USB1_PHY_CFG_AHB_CLK>,

				 <&xo>;

			clock-names = "cfg_ahb", "ref";



			resets = <&gcc GCC_QUSB2_1_PHY_BCR>;

			status = "disabled";

		};



		ssphy_0: phy@78000 {

			compatible = "qcom,ipq8074-qmp-usb3-phy";

			reg = <0x00078000 0x1c4>;

			#clock-cells = <1>;

			#address-cells = <1>;

			#size-cells = <1>;

			ranges;



			clocks = <&gcc GCC_USB0_AUX_CLK>,

				<&gcc GCC_USB0_PHY_CFG_AHB_CLK>,

				<&xo>;

			clock-names = "aux", "cfg_ahb", "ref";



			resets =  <&gcc GCC_USB0_PHY_BCR>,

				<&gcc GCC_USB3PHY_0_PHY_BCR>;

			reset-names = "phy","common";

			status = "disabled";



			usb0_ssphy: lane@78200 {

				reg = <0x00078200 0x130>,       /* Tx */

				      <0x00078400 0x200>,     /* Rx */

				      <0x00078800 0x1f8>,     /* PCS  */

				      <0x00078600 0x044>;     /* PCS misc*/

				#phy-cells = <0>;

				clocks = <&gcc GCC_USB0_PIPE_CLK>;

				clock-names = "pipe0";

				clock-output-names = "gcc_usb0_pipe_clk_src";

			};

		};



		qusb_phy_0: phy@79000 {

			compatible = "qcom,ipq8074-qusb2-phy";

			reg = <0x00079000 0x180>;

			#phy-cells = <0>;



			clocks = <&gcc GCC_USB0_PHY_CFG_AHB_CLK>,

				 <&xo>;

			clock-names = "cfg_ahb", "ref";



			resets = <&gcc GCC_QUSB2_0_PHY_BCR>;

		};



		pcie_phy0: phy@86000 {

			compatible = "qcom,ipq8074-qmp-pcie-phy";

			reg = <0x00086000 0x1000>;
@@ -169,6 +254,28 @@ 
			#reset-cells = <0x1>;

		};



		sdhc_1: sdhci@7824900 {

			compatible = "qcom,sdhci-msm-v4";

			reg = <0x7824900 0x500>, <0x7824000 0x800>;

			reg-names = "hc_mem", "core_mem";



			interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;

			interrupt-names = "hc_irq", "pwr_irq";



			clocks = <&xo>,

				 <&gcc GCC_SDCC1_AHB_CLK>,

				 <&gcc GCC_SDCC1_APPS_CLK>;

			clock-names = "xo", "iface", "core";

			max-frequency = <384000000>;

			mmc-ddr-1_8v;

			mmc-hs200-1_8v;

			mmc-hs400-1_8v;

			bus-width = <8>;



			status = "disabled";

		};



		blsp_dma: dma@7884000 {

			compatible = "qcom,bam-v1.7.0";

			reg = <0x07884000 0x2b000>;
@@ -294,6 +401,88 @@ 
			status = "disabled";

		};



		usb_0: usb@8af8800 {

			compatible = "qcom,dwc3";

			reg = <0x08af8800 0x400>;

			#address-cells = <1>;

			#size-cells = <1>;

			ranges;



			clocks = <&gcc GCC_SYS_NOC_USB0_AXI_CLK>,

				<&gcc GCC_USB0_MASTER_CLK>,

				<&gcc GCC_USB0_SLEEP_CLK>,

				<&gcc GCC_USB0_MOCK_UTMI_CLK>;

			clock-names = "sys_noc_axi",

				"master",

				"sleep",

				"mock_utmi";



			assigned-clocks = <&gcc GCC_SYS_NOC_USB0_AXI_CLK>,

					  <&gcc GCC_USB0_MASTER_CLK>,

					  <&gcc GCC_USB0_MOCK_UTMI_CLK>;

			assigned-clock-rates = <133330000>,

						<133330000>,

						<19200000>;



			resets = <&gcc GCC_USB0_BCR>;

			status = "disabled";



			dwc_0: dwc3@8a00000 {

				compatible = "snps,dwc3";

				reg = <0x8a00000 0xcd00>;

				interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;

				phys = <&qusb_phy_0>, <&usb0_ssphy>;

				phy-names = "usb2-phy", "usb3-phy";

				tx-fifo-resize;

				snps,is-utmi-l1-suspend;

				snps,hird-threshold = /bits/ 8 <0x0>;

				snps,dis_u2_susphy_quirk;

				snps,dis_u3_susphy_quirk;

				dr_mode = "host";

			};

		};



		usb_1: usb@8cf8800 {

			compatible = "qcom,dwc3";

			reg = <0x08cf8800 0x400>;

			#address-cells = <1>;

			#size-cells = <1>;

			ranges;



			clocks = <&gcc GCC_SYS_NOC_USB1_AXI_CLK>,

				<&gcc GCC_USB1_MASTER_CLK>,

				<&gcc GCC_USB1_SLEEP_CLK>,

				<&gcc GCC_USB1_MOCK_UTMI_CLK>;

			clock-names = "sys_noc_axi",

				"master",

				"sleep",

				"mock_utmi";



			assigned-clocks = <&gcc GCC_SYS_NOC_USB1_AXI_CLK>,

					  <&gcc GCC_USB1_MASTER_CLK>,

					  <&gcc GCC_USB1_MOCK_UTMI_CLK>;

			assigned-clock-rates = <133330000>,

						<133330000>,

						<19200000>;



			resets = <&gcc GCC_USB1_BCR>;

			status = "disabled";



			dwc_1: dwc3@8c00000 {

				compatible = "snps,dwc3";

				reg = <0x8c00000 0xcd00>;

				interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>;

				phys = <&qusb_phy_1>, <&usb1_ssphy>;

				phy-names = "usb2-phy", "usb3-phy";

				tx-fifo-resize;

				snps,is-utmi-l1-suspend;

				snps,hird-threshold = /bits/ 8 <0x0>;

				snps,dis_u2_susphy_quirk;

				snps,dis_u3_susphy_quirk;

				dr_mode = "host";

			};

		};



		intc: interrupt-controller@b000000 {

			compatible = "qcom,msm-qgic2";

			interrupt-controller;

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