Commit c6dbef73 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'usb-5.10-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb 

Pull USB/PHY/Thunderbolt driver updates from Greg KH:
 "Here is the big set of USB, PHY, and Thunderbolt driver updates for
  5.10-rc1.

  Lots of tiny different things for these subsystems are in here,
  including:

   - phy driver updates

   - thunderbolt / USB 4 updates and additions

   - USB gadget driver updates

   - xhci fixes and updates

   - typec driver additions and updates

   - api conversions to various drivers for core kernel api changes

   - new USB control message functions to make it harder to get wrong,
     as found by syzbot (took 2 tries to get it right)

   - lots of tiny USB driver fixes and updates all over the place

  All of these have been in linux-next for a while, with the exception
  of the last "obviously correct" patch that updated a FALLTHROUGH
  comment that got merged last weekend"

* tag 'usb-5.10-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (374 commits)
  usb: musb: gadget: Use fallthrough pseudo-keyword
  usb: typec: Add QCOM PMIC typec detection driver
  USB: serial: option: add Cellient MPL200 card
  usb: typec: tcpci_maxim: Add support for Sink FRS
  usb: typec: tcpci: Implement callbacks for FRS
  usb: typec: tcpm: Add support for Sink Fast Role SWAP(FRS)
  usb: typec: tcpci_maxim: Chip level TCPC driver
  usb: typec: tcpci: Add set_vbus tcpci callback
  usb: typec: tcpci: Add a getter method to retrieve tcpm_port reference
  usbip: vhci_hcd: fix calling usb_hcd_giveback_urb() with irqs enabled
  usb: cdc-acm: add quirk to blacklist ETAS ES58X devices
  USB: serial: ftdi_sio: use cur_altsetting for consistency
  USB: serial: option: Add Telit FT980-KS composition
  USB: core: remove polling for /sys/kernel/debug/usb/devices
  usb: typec: add support for STUSB160x Type-C controller family
  usb: typec: add typec_find_pwr_opmode
  usb: typec: hd3ss3220: Use OF graph API to get the connector fwnode
  dt-bindings: usb: renesas,usb3-peri: Document HS and SS data bus
  dt-bindings: usb: convert ti,hd3ss3220 bindings to json-schema
  usb: dwc2: Fix INTR OUT transfers in DDMA mode.
  ...
parents ade7afe3 93578a25

Documentation/devicetree/bindings/arm/bcm/raspberrypi,bcm2835-firmware.yaml

+21 −0
Original line number Diff line number Diff line
@@ -48,6 +48,22 @@ properties: 
      - compatible

      - "#clock-cells"



  reset:

    type: object



    properties:

      compatible:

        const: raspberrypi,firmware-reset



      "#reset-cells":

        const: 1

        description: >

          The argument is the ID of the firmware reset line to affect.



    required:

      - compatible

      - "#reset-cells"



    additionalProperties: false



required:
@@ -66,5 +82,10 @@ examples: 
            compatible = "raspberrypi,firmware-clocks";

            #clock-cells = <1>;

        };



        reset: reset {

            compatible = "raspberrypi,firmware-reset";

            #reset-cells = <1>;

        };

    };

...

Documentation/devicetree/bindings/phy/fsl,imx8mq-usb-phy.txt

+1 −1
Original line number Diff line number Diff line 
* Freescale i.MX8MQ USB3 PHY binding



Required properties:

- compatible:	Should be "fsl,imx8mq-usb-phy"

- compatible:	Should be "fsl,imx8mq-usb-phy" or "fsl,imx8mp-usb-phy"

- #phys-cells:	must be 0 (see phy-bindings.txt in this directory)

- reg:		The base address and length of the registers

- clocks:	phandles to the clocks for each clock listed in clock-names

Documentation/devicetree/bindings/phy/intel,lgm-emmc-phy.yaml

+16 −1
Original line number Diff line number Diff line
@@ -23,7 +23,9 @@ description: |+ 


properties:

  compatible:

    const: intel,lgm-emmc-phy

    oneOf:

      - const: intel,lgm-emmc-phy

      - const: intel,keembay-emmc-phy



  "#phy-cells":

    const: 0
@@ -34,6 +36,10 @@ properties: 
  clocks:

    maxItems: 1



  clock-names:

    items:

      - const: emmcclk



required:

  - "#phy-cells"

  - compatible
@@ -57,4 +63,13 @@ examples: 
        #phy-cells = <0>;

      };

    };



  - |

    phy@20290000 {

          compatible = "intel,keembay-emmc-phy";

          reg = <0x20290000 0x54>;

          clocks = <&emmc>;

          clock-names = "emmcclk";

          #phy-cells = <0>;

    };

...

Documentation/devicetree/bindings/phy/intel,lgm-usb-phy.yaml

0 → 100644
+58 −0
Original line number Diff line number Diff line 
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/phy/intel,lgm-usb-phy.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Intel LGM USB PHY Device Tree Bindings



maintainers:

  - Vadivel Murugan Ramuthevar <vadivel.muruganx.ramuthevar@linux.intel.com>



properties:

  compatible:

    const: intel,lgm-usb-phy



  reg:

    maxItems: 1



  clocks:

    maxItems: 1



  resets:

    items:

      - description: USB PHY and Host controller reset

      - description: APB BUS reset

      - description: General Hardware reset



  reset-names:

    items:

      - const: phy

      - const: apb

      - const: phy31



  "#phy-cells":

    const: 0



required:

  - compatible

  - clocks

  - reg

  - resets

  - reset-names

  - "#phy-cells"



additionalProperties: false



examples:

  - |

    usb-phy@e7e00000 {

        compatible = "intel,lgm-usb-phy";

        reg = <0xe7e00000 0x10000>;

        clocks = <&cgu0 153>;

        resets = <&rcu 0x70 0x24>,

                 <&rcu 0x70 0x26>,

                 <&rcu 0x70 0x28>;

        reset-names = "phy", "apb", "phy31";

        #phy-cells = <0>;

    };

Documentation/devicetree/bindings/phy/phy-cadence-torrent.yaml

+79 −17
Original line number Diff line number Diff line
@@ -4,11 +4,13 @@ 
$id: "http://devicetree.org/schemas/phy/phy-cadence-torrent.yaml#"

$schema: "http://devicetree.org/meta-schemas/core.yaml#"



title: Cadence Torrent SD0801 PHY binding for DisplayPort

title: Cadence Torrent SD0801 PHY binding



description:

  This binding describes the Cadence SD0801 PHY (also known as Torrent PHY)

  hardware included with the Cadence MHDP DisplayPort controller.

  hardware included with the Cadence MHDP DisplayPort controller. Torrent

  PHY also supports multilink multiprotocol combinations including protocols

  such as PCIe, USB, SGMII, QSGMII etc.



maintainers:

  - Swapnil Jakhade <sjakhade@cadence.com>
@@ -49,13 +51,21 @@ properties: 
      - const: dptx_phy



  resets:

    maxItems: 1

    description:

      Torrent PHY reset.

      See Documentation/devicetree/bindings/reset/reset.txt

    minItems: 1

    maxItems: 2

    items:

      - description: Torrent PHY reset.

      - description: Torrent APB reset. This is optional.



  reset-names:

    minItems: 1

    maxItems: 2

    items:

      - const: torrent_reset

      - const: torrent_apb



patternProperties:

  '^phy@[0-7]+$':

  '^phy@[0-3]$':

    type: object

    description:

      Each group of PHY lanes with a single master lane should be represented as a sub-node.
@@ -63,6 +73,8 @@ patternProperties: 
      reg:

        description:

          The master lane number. This is the lowest numbered lane in the lane group.

        minimum: 0

        maximum: 3



      resets:

        minItems: 1
@@ -78,15 +90,25 @@ patternProperties: 
          Specifies the type of PHY for which the group of PHY lanes is used.

          Refer include/dt-bindings/phy/phy.h. Constants from the header should be used.

        $ref: /schemas/types.yaml#/definitions/uint32

        enum: [1, 2, 3, 4, 5, 6]

        minimum: 1

        maximum: 9



      cdns,num-lanes:

        description:

          Number of DisplayPort lanes.

          Number of lanes.

        $ref: /schemas/types.yaml#/definitions/uint32

        enum: [1, 2, 4]

        enum: [1, 2, 3, 4]

        default: 4



      cdns,ssc-mode:

        description:

          Specifies the Spread Spectrum Clocking mode used. It can be NO_SSC,

          EXTERNAL_SSC or INTERNAL_SSC.

          Refer include/dt-bindings/phy/phy-cadence-torrent.h for the constants to be used.

        $ref: /schemas/types.yaml#/definitions/uint32

        enum: [0, 1, 2]

        default: 0



      cdns,max-bit-rate:

        description:

          Maximum DisplayPort link bit rate to use, in Mbps
@@ -99,6 +121,7 @@ patternProperties: 
      - resets

      - "#phy-cells"

      - cdns,phy-type

      - cdns,num-lanes



    additionalProperties: false
@@ -111,6 +134,7 @@ required: 
  - reg

  - reg-names

  - resets

  - reset-names



additionalProperties: false
@@ -128,6 +152,7 @@ examples: 
                  <0xf0 0xfb030a00 0x0 0x00000040>;

            reg-names = "torrent_phy", "dptx_phy";

            resets = <&phyrst 0>;

            reset-names = "torrent_reset";

            clocks = <&ref_clk>;

            clock-names = "refclk";

            #address-cells = <1>;
@@ -143,4 +168,41 @@ examples: 
            };

        };

    };

  - |

    #include <dt-bindings/phy/phy.h>

    #include <dt-bindings/phy/phy-cadence-torrent.h>



    bus {

        #address-cells = <2>;

        #size-cells = <2>;



        torrent-phy@f0fb500000 {

            compatible = "cdns,torrent-phy";

            reg = <0xf0 0xfb500000 0x0 0x00100000>;

            reg-names = "torrent_phy";

            resets = <&phyrst 0>, <&phyrst 1>;

            reset-names = "torrent_reset", "torrent_apb";

            clocks = <&ref_clk>;

            clock-names = "refclk";

            #address-cells = <1>;

            #size-cells = <0>;

            phy@0 {

                reg = <0>;

                resets = <&phyrst 2>, <&phyrst 3>;

                #phy-cells = <0>;

                cdns,phy-type = <PHY_TYPE_PCIE>;

                cdns,num-lanes = <2>;

                cdns,ssc-mode = <TORRENT_SERDES_NO_SSC>;

            };



            phy@2 {

                reg = <2>;

                resets = <&phyrst 4>;

                #phy-cells = <0>;

                cdns,phy-type = <PHY_TYPE_SGMII>;

                cdns,num-lanes = <1>;

                cdns,ssc-mode = <TORRENT_SERDES_NO_SSC>;

            };

        };

    };

...

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