iwlwifi: pcie: remove unnecessary iwl_pcie_enable_rx_wake() function (c688e396) · Commits · 戴 / test

drivers/net/wireless/intel/iwlwifi/pcie/internal.h

+0 −2

Original line number	Diff line number	Diff line
		@@ -1029,8 +1029,6 @@ static inline int iwl_trans_pcie_dbgfs_register(struct iwl_trans *trans)
		int iwl_pci_fw_exit_d0i3(struct iwl_trans *trans);
		int iwl_pci_fw_enter_d0i3(struct iwl_trans *trans);

		void iwl_pcie_enable_rx_wake(struct iwl_trans *trans, bool enable);

		void iwl_pcie_rx_allocator_work(struct work_struct *data);

		/* common functions that are used by gen2 transport */

+0 −26

Original line number	Diff line number	Diff line
		@@ -868,30 +868,6 @@ static void iwl_pcie_rx_hw_init(struct iwl_trans trans, struct iwl_rxq rxq)
		iwl_set_bit(trans, CSR_INT_COALESCING, IWL_HOST_INT_OPER_MODE);
		}

		void iwl_pcie_enable_rx_wake(struct iwl_trans *trans, bool enable)
		{
		if (trans->cfg->device_family != IWL_DEVICE_FAMILY_9000)
		return;

		if (CSR_HW_REV_STEP(trans->hw_rev) != SILICON_A_STEP)
		return;

		if (!trans->cfg->integrated)
		return;

		/*
		* Turn on the chicken-bits that cause MAC wakeup for RX-related
		* values.
		* This costs some power, but needed for W/A 9000 integrated A-step
		* bug where shadow registers are not in the retention list and their
		* value is lost when NIC powers down
		*/
		iwl_set_bit(trans, CSR_MAC_SHADOW_REG_CTRL,
		CSR_MAC_SHADOW_REG_CTRL_RX_WAKE);
		iwl_set_bit(trans, CSR_MAC_SHADOW_REG_CTL2,
		CSR_MAC_SHADOW_REG_CTL2_RX_WAKE);
		}

		static void iwl_pcie_rx_mq_hw_init(struct iwl_trans *trans)
		{
		struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
		@@ -979,8 +955,6 @@ static void iwl_pcie_rx_mq_hw_init(struct iwl_trans *trans)

		/* Set interrupt coalescing timer to default (2048 usecs) */
		iwl_write8(trans, CSR_INT_COALESCING, IWL_HOST_INT_TIMEOUT_DEF);

		iwl_pcie_enable_rx_wake(trans, true);
		}

		void iwl_pcie_rx_init_rxb_lists(struct iwl_rxq *rxq)

+0 −4

Original line number	Diff line number	Diff line
		@@ -1530,8 +1530,6 @@ static void iwl_trans_pcie_d3_suspend(struct iwl_trans *trans, bool test,
		iwl_clear_bit(trans, CSR_GP_CNTRL,
		BIT(trans->cfg->csr->flag_init_done));

		iwl_pcie_enable_rx_wake(trans, false);

		if (reset) {
		/*
		* reset TX queues -- some of their registers reset during S3
		@@ -1558,8 +1556,6 @@ static int iwl_trans_pcie_d3_resume(struct iwl_trans *trans,
		return 0;
		}

		iwl_pcie_enable_rx_wake(trans, true);

		iwl_set_bit(trans, CSR_GP_CNTRL,
		BIT(trans->cfg->csr->flag_mac_access_req));
		iwl_set_bit(trans, CSR_GP_CNTRL,