Commit c677124e authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'sched-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip 

Pull scheduler updates from Ingo Molnar:
 "These were the main changes in this cycle:

   - More -rt motivated separation of CONFIG_PREEMPT and
     CONFIG_PREEMPTION.

   - Add more low level scheduling topology sanity checks and warnings
     to filter out nonsensical topologies that break scheduling.

   - Extend uclamp constraints to influence wakeup CPU placement

   - Make the RT scheduler more aware of asymmetric topologies and CPU
     capacities, via uclamp metrics, if CONFIG_UCLAMP_TASK=y

   - Make idle CPU selection more consistent

   - Various fixes, smaller cleanups, updates and enhancements - please
     see the git log for details"

* 'sched-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (58 commits)
  sched/fair: Define sched_idle_cpu() only for SMP configurations
  sched/topology: Assert non-NUMA topology masks don't (partially) overlap
  idle: fix spelling mistake "iterrupts" -> "interrupts"
  sched/fair: Remove redundant call to cpufreq_update_util()
  sched/psi: create /proc/pressure and /proc/pressure/{io|memory|cpu} only when psi enabled
  sched/fair: Fix sgc->{min,max}_capacity calculation for SD_OVERLAP
  sched/fair: calculate delta runnable load only when it's needed
  sched/cputime: move rq parameter in irqtime_account_process_tick
  stop_machine: Make stop_cpus() static
  sched/debug: Reset watchdog on all CPUs while processing sysrq-t
  sched/core: Fix size of rq::uclamp initialization
  sched/uclamp: Fix a bug in propagating uclamp value in new cgroups
  sched/fair: Load balance aggressively for SCHED_IDLE CPUs
  sched/fair : Improve update_sd_pick_busiest for spare capacity case
  watchdog: Remove soft_lockup_hrtimer_cnt and related code
  sched/rt: Make RT capacity-aware
  sched/fair: Make EAS wakeup placement consider uclamp restrictions
  sched/fair: Make task_fits_capacity() consider uclamp restrictions
  sched/uclamp: Rename uclamp_util_with() into uclamp_rq_util_with()
  sched/uclamp: Make uclamp util helpers use and return UL values
  ...
parents c0e809e2 afa70d94

arch/arc/kernel/entry.S

+3 −3
Original line number Diff line number Diff line
@@ -337,11 +337,11 @@ resume_user_mode_begin: 
resume_kernel_mode:



	; Disable Interrupts from this point on

	; CONFIG_PREEMPT: This is a must for preempt_schedule_irq()

	; !CONFIG_PREEMPT: To ensure restore_regs is intr safe

	; CONFIG_PREEMPTION: This is a must for preempt_schedule_irq()

	; !CONFIG_PREEMPTION: To ensure restore_regs is intr safe

	IRQ_DISABLE	r9



#ifdef CONFIG_PREEMPT

#ifdef CONFIG_PREEMPTION



	; Can't preempt if preemption disabled

	GET_CURR_THR_INFO_FROM_SP   r10

arch/arm/include/asm/switch_to.h

+1 −1
Original line number Diff line number Diff line
@@ -10,7 +10,7 @@ 
 * to ensure that the maintenance completes in case we migrate to another

 * CPU.

 */

#if defined(CONFIG_PREEMPT) && defined(CONFIG_SMP) && defined(CONFIG_CPU_V7)

#if defined(CONFIG_PREEMPTION) && defined(CONFIG_SMP) && defined(CONFIG_CPU_V7)

#define __complete_pending_tlbi()	dsb(ish)

#else

#define __complete_pending_tlbi()

arch/arm/kernel/entry-armv.S

+2 −2
Original line number Diff line number Diff line
@@ -211,7 +211,7 @@ __irq_svc: 
	svc_entry

	irq_handler



#ifdef CONFIG_PREEMPT

#ifdef CONFIG_PREEMPTION

	ldr	r8, [tsk, #TI_PREEMPT]		@ get preempt count

	ldr	r0, [tsk, #TI_FLAGS]		@ get flags

	teq	r8, #0				@ if preempt count != 0
@@ -226,7 +226,7 @@ ENDPROC(__irq_svc) 


	.ltorg



#ifdef CONFIG_PREEMPT

#ifdef CONFIG_PREEMPTION

svc_preempt:

	mov	r8, lr

1:	bl	preempt_schedule_irq		@ irq en/disable is done inside

arch/arm/kernel/traps.c

+2 −0
Original line number Diff line number Diff line
@@ -248,6 +248,8 @@ void show_stack(struct task_struct *tsk, unsigned long *sp) 


#ifdef CONFIG_PREEMPT

#define S_PREEMPT " PREEMPT"

#elif defined(CONFIG_PREEMPT_RT)

#define S_PREEMPT " PREEMPT_RT"

#else

#define S_PREEMPT ""

#endif

arch/arm/mm/cache-v7.S

+2 −2
Original line number Diff line number Diff line
@@ -135,13 +135,13 @@ flush_levels: 
	and	r1, r1, #7			@ mask of the bits for current cache only

	cmp	r1, #2				@ see what cache we have at this level

	blt	skip				@ skip if no cache, or just i-cache

#ifdef CONFIG_PREEMPT

#ifdef CONFIG_PREEMPTION

	save_and_disable_irqs_notrace r9	@ make cssr&csidr read atomic

#endif

	mcr	p15, 2, r10, c0, c0, 0		@ select current cache level in cssr

	isb					@ isb to sych the new cssr&csidr

	mrc	p15, 1, r1, c0, c0, 0		@ read the new csidr

#ifdef CONFIG_PREEMPT

#ifdef CONFIG_PREEMPTION

	restore_irqs_notrace r9

#endif

	and	r2, r1, #7			@ extract the length of the cache lines

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