Commit c657b936 authored by Alex Deucher's avatar Alex Deucher
Browse files

drm/amdgpu/soc15: fix xclk for raven 



It's 25 Mhz (refclk / 4).  This fixes the interpretation
of the rlc clock counter.

Acked-by: default avatarEvan Quan <evan.quan@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
parent aad4e2db

drivers/gpu/drm/amd/amdgpu/soc15.c

+6 −1
Original line number Diff line number Diff line
@@ -272,7 +272,12 @@ static u32 soc15_get_config_memsize(struct amdgpu_device *adev) 


static u32 soc15_get_xclk(struct amdgpu_device *adev)

{

	return adev->clock.spll.reference_freq;

	u32 reference_clock = adev->clock.spll.reference_freq;



	if (adev->asic_type == CHIP_RAVEN)

		return reference_clock / 4;



	return reference_clock;

}

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