Commit c6578d98 authored by Daniel Baluta's avatar Daniel Baluta Committed by Shawn Guo
Browse files

arm64: dts: imx8mq-evk: Enable audio codec wm8524



The main Audio DAC used on the EVK board is wm8524
The EVK provides the MCLK to wm8524.

Digital interface is SAI2 which includes three signals:
SYNC_CLK, BCLK and DACDAT.

This patch sets:
        * SAI2 pinctrl configuration
        * clock hierarchy
        * wm8524 codec

Then uses simple-card machine driver to connect them
into a sound card.

Signed-off-by: default avatarDaniel Baluta <daniel.baluta@nxp.com>
Reviewed-by: default avatarFabio Estevam <festevam@gmail.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 8c61538d
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+48 −0
Original line number Diff line number Diff line
@@ -43,6 +43,35 @@
		states = <1000000 0x0
			  900000 0x1>;
	};

	wm8524: audio-codec {
		#sound-dai-cells = <0>;
		compatible = "wlf,wm8524";
		wlf,mute-gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
	};

	sound-wm8524 {
		compatible = "simple-audio-card";
		simple-audio-card,name = "wm8524-audio";
		simple-audio-card,format = "i2s";
		simple-audio-card,frame-master = <&cpudai>;
		simple-audio-card,bitclock-master = <&cpudai>;
		simple-audio-card,widgets =
			"Line", "Left Line Out Jack",
			"Line", "Right Line Out Jack";
		simple-audio-card,routing =
			"Left Line Out Jack", "LINEVOUTL",
			"Right Line Out Jack", "LINEVOUTR";

		cpudai: simple-audio-card,cpu {
			sound-dai = <&sai2>;
		};

		link_codec: simple-audio-card,codec {
			sound-dai = <&wm8524>;
			clocks = <&clk IMX8MQ_CLK_SAI2_ROOT>;
		};
	};
};

&A53_0 {
@@ -80,6 +109,15 @@
	};
};

&sai2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_sai2>;
	assigned-clocks = <&clk IMX8MQ_CLK_SAI2>;
	assigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1_OUT>;
	assigned-clock-rates = <24576000>;
	status = "okay";
};

&i2c1 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
@@ -283,6 +321,16 @@
		>;
	};

	pinctrl_sai2: sai2grp {
		fsl,pins = <
			MX8MQ_IOMUXC_SAI2_TXFS_SAI2_TX_SYNC     0xd6
			MX8MQ_IOMUXC_SAI2_TXC_SAI2_TX_BCLK      0xd6
			MX8MQ_IOMUXC_SAI2_MCLK_SAI2_MCLK        0xd6
			MX8MQ_IOMUXC_SAI2_TXD0_SAI2_TX_DATA0    0xd6
			MX8MQ_IOMUXC_GPIO1_IO08_GPIO1_IO8       0xd6
		>;
	};

	pinctrl_uart1: uart1grp {
		fsl,pins = <
			MX8MQ_IOMUXC_UART1_RXD_UART1_DCE_RX		0x49