Commit c6188dff authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'csky-for-linus-5.6-rc3' of git://github.com/c-sky/csky-linux

Pull csky updates from Guo Ren:
 "Sorry, I missed 5.6-rc1 merge window, but in this pull request the
  most are the fixes and the rests are between fixes and features. The
  only outside modification is the MAINTAINERS file update with our
  mailing list.

   - cache flush implementation fixes

   - ftrace modify panic fix

   - CONFIG_SMP boot problem fix

   - fix pt_regs saving for atomic.S

   - fix fixaddr_init without highmem.

   - fix stack protector support

   - fix fake Tightly-Coupled Memory code compile and use

   - fix some typos and coding convention"

* tag 'csky-for-linus-5.6-rc3' of git://github.com/c-sky/csky-linux: (23 commits)
  csky: Replace <linux/clk-provider.h> by <linux/of_clk.h>
  csky: Implement copy_thread_tls
  csky: Add PCI support
  csky: Minimize defconfig to support buildroot config.fragment
  csky: Add setup_initrd check code
  csky: Cleanup old Kconfig options
  arch/csky: fix some Kconfig typos
  csky: Fixup compile warning for three unimplemented syscalls
  csky: Remove unused cache implementation
  csky: Fixup ftrace modify panic
  csky: Add flush_icache_mm to defer flush icache all
  csky: Optimize abiv2 copy_to_user_page with VM_EXEC
  csky: Enable defer flush_dcache_page for abiv2 cpus (807/810/860)
  csky: Remove unnecessary flush_icache_* implementation
  csky: Support icache flush without specific instructions
  csky/Kconfig: Add Kconfig.platforms to support some drivers
  csky/smp: Fixup boot failed when CONFIG_SMP
  csky: Set regs->usp to kernel sp, when the exception is from kernel
  csky/mm: Fixup export invalid_pte_table symbol
  csky: Separate fixaddr_init from highmem
  ...
parents dca132a6 99db590b
Loading
Loading
Loading
Loading
+1 −0
Original line number Diff line number Diff line
@@ -3649,6 +3649,7 @@ F: sound/pci/oxygen/
C-SKY ARCHITECTURE
M:	Guo Ren <guoren@kernel.org>
L:	linux-csky@vger.kernel.org
T:	git https://github.com/c-sky/csky-linux.git
S:	Supported
F:	arch/csky/
+48 −3
Original line number Diff line number Diff line
@@ -9,7 +9,6 @@ config CSKY
	select ARCH_USE_QUEUED_RWLOCKS if NR_CPUS>2
	select COMMON_CLK
	select CLKSRC_MMIO
	select CLKSRC_OF
	select CSKY_MPINTC if CPU_CK860
	select CSKY_MP_TIMER if CPU_CK860
	select CSKY_APB_INTC
@@ -37,6 +36,7 @@ config CSKY
	select GX6605S_TIMER if CPU_CK610
	select HAVE_ARCH_TRACEHOOK
	select HAVE_ARCH_AUDITSYSCALL
	select HAVE_COPY_THREAD_TLS
	select HAVE_DYNAMIC_FTRACE
	select HAVE_FUNCTION_TRACER
	select HAVE_FUNCTION_GRAPH_TRACER
@@ -47,8 +47,8 @@ config CSKY
	select HAVE_PERF_EVENTS
	select HAVE_PERF_REGS
	select HAVE_PERF_USER_STACK_DUMP
	select HAVE_DMA_API_DEBUG
	select HAVE_DMA_CONTIGUOUS
	select HAVE_STACKPROTECTOR
	select HAVE_SYSCALL_TRACEPOINTS
	select MAY_HAVE_SPARSE_IRQ
	select MODULES_USE_ELF_RELA if MODULES
@@ -59,6 +59,11 @@ config CSKY
	select TIMER_OF
	select USB_ARCH_HAS_EHCI
	select USB_ARCH_HAS_OHCI
	select GENERIC_PCI_IOMAP
	select HAVE_PCI
	select PCI_DOMAINS_GENERIC if PCI
	select PCI_SYSCALL if PCI
	select PCI_MSI if PCI

config CPU_HAS_CACHEV2
	bool
@@ -75,7 +80,7 @@ config CPU_HAS_TLBI
config CPU_HAS_LDSTEX
	bool
	help
	  For SMP, CPU needs "ldex&stex" instrcutions to atomic operations.
	  For SMP, CPU needs "ldex&stex" instructions for atomic operations.

config CPU_NEED_TLBSYNC
	bool
@@ -188,6 +193,40 @@ config CPU_PM_STOP
	bool "stop"
endchoice

menuconfig HAVE_TCM
	bool "Tightly-Coupled/Sram Memory"
	select GENERIC_ALLOCATOR
	help
	  The implementation are not only used by TCM (Tightly-Coupled Meory)
	  but also used by sram on SOC bus. It follow existed linux tcm
	  software interface, so that old tcm application codes could be
	  re-used directly.

if HAVE_TCM
config ITCM_RAM_BASE
	hex "ITCM ram base"
	default 0xffffffff

config ITCM_NR_PAGES
	int "Page count of ITCM size: NR*4KB"
	range 1 256
	default 32

config HAVE_DTCM
	bool "DTCM Support"

config DTCM_RAM_BASE
	hex "DTCM ram base"
	depends on HAVE_DTCM
	default 0xffffffff

config DTCM_NR_PAGES
	int "Page count of DTCM size: NR*4KB"
	depends on HAVE_DTCM
	range 1 256
	default 32
endif

config CPU_HAS_VDSP
	bool "CPU has VDSP coprocessor"
	depends on CPU_HAS_FPU && CPU_HAS_FPUV2
@@ -196,6 +235,10 @@ config CPU_HAS_FPU
	bool "CPU has FPU coprocessor"
	depends on CPU_CK807 || CPU_CK810 || CPU_CK860

config CPU_HAS_ICACHE_INS
	bool "CPU has Icache invalidate instructions"
	depends on CPU_HAS_CACHEV2

config CPU_HAS_TEE
	bool "CPU has Trusted Execution Environment"
	depends on CPU_CK810
@@ -235,4 +278,6 @@ config HOTPLUG_CPU
	  Say N if you want to disable CPU hotplug.
endmenu

source "arch/csky/Kconfig.platforms"

source "kernel/Kconfig.hz"
+9 −0
Original line number Diff line number Diff line
menu "Platform drivers selection"

config ARCH_CSKY_DW_APB_ICTL
	bool "Select dw-apb interrupt controller"
	select DW_APB_ICTL
	default y
	help
	  This enables support for snps dw-apb-ictl
endmenu
+2 −3
Original line number Diff line number Diff line
@@ -48,9 +48,8 @@ extern void flush_cache_range(struct vm_area_struct *vma, unsigned long start, u

#define flush_icache_page(vma, page)		do {} while (0);
#define flush_icache_range(start, end)		cache_wbinv_range(start, end)

#define flush_icache_user_range(vma,page,addr,len) \
	flush_dcache_page(page)
#define flush_icache_mm_range(mm, start, end)	cache_wbinv_range(start, end)
#define flush_icache_deferred(mm)		do {} while (0);

#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
do { \
+14 −5
Original line number Diff line number Diff line
@@ -16,14 +16,16 @@
#define LSAVE_A4	40
#define LSAVE_A5	44

#define usp ss1

.macro USPTOKSP
	mtcr	sp, ss1
	mtcr	sp, usp
	mfcr	sp, ss0
.endm

.macro KSPTOUSP
	mtcr	sp, ss0
	mfcr	sp, ss1
	mfcr	sp, usp
.endm

.macro	SAVE_ALL epc_inc
@@ -45,7 +47,13 @@
	add	lr, r13
	stw     lr, (sp, 8)

	mov	lr, sp
	addi	lr, 32
	addi	lr, 32
	addi	lr, 16
	bt	2f
	mfcr	lr, ss1
2:
	stw     lr, (sp, 16)

	stw     a0, (sp, 20)
@@ -79,9 +87,10 @@
	ldw     a0, (sp, 12)
	mtcr    a0, epsr
	btsti   a0, 31
	bt      1f
	ldw     a0, (sp, 16)
	mtcr	a0, ss1

1:
	ldw     a0, (sp, 24)
	ldw     a1, (sp, 28)
	ldw     a2, (sp, 32)
@@ -102,9 +111,9 @@
	addi	sp, 32
	addi	sp, 8

	bt      1f
	bt      2f
	KSPTOUSP
1:
2:
	rte
.endm

Loading