Commit c604b82a authored by Taniya Das's avatar Taniya Das Committed by Andy Gross
Browse files

arm64: dts: sdm845: Add cpufreq device node



This change adds the cpufreq node as per the bindings example for SDM845.

Reviewed-by: default avatarMatthias Kaehlcke <mka@chromium.org>
Signed-off-by: default avatarTaniya Das <tdas@codeaurora.org>
Tested-by: default avatarMatthias Kaehlcke <mka@chromium.org>
Signed-off-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: default avatarAndy Gross <andy.gross@linaro.org>
parent 9ebfcba1
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+19 −0
Original line number Diff line number Diff line
@@ -99,6 +99,7 @@
			compatible = "qcom,kryo385";
			reg = <0x0 0x0>;
			enable-method = "psci";
			qcom,freq-domain = <&cpufreq_hw 0>;
			next-level-cache = <&L2_0>;
			L2_0: l2-cache {
				compatible = "cache";
@@ -114,6 +115,7 @@
			compatible = "qcom,kryo385";
			reg = <0x0 0x100>;
			enable-method = "psci";
			qcom,freq-domain = <&cpufreq_hw 0>;
			next-level-cache = <&L2_100>;
			L2_100: l2-cache {
				compatible = "cache";
@@ -126,6 +128,7 @@
			compatible = "qcom,kryo385";
			reg = <0x0 0x200>;
			enable-method = "psci";
			qcom,freq-domain = <&cpufreq_hw 0>;
			next-level-cache = <&L2_200>;
			L2_200: l2-cache {
				compatible = "cache";
@@ -138,6 +141,7 @@
			compatible = "qcom,kryo385";
			reg = <0x0 0x300>;
			enable-method = "psci";
			qcom,freq-domain = <&cpufreq_hw 0>;
			next-level-cache = <&L2_300>;
			L2_300: l2-cache {
				compatible = "cache";
@@ -150,6 +154,7 @@
			compatible = "qcom,kryo385";
			reg = <0x0 0x400>;
			enable-method = "psci";
			qcom,freq-domain = <&cpufreq_hw 1>;
			next-level-cache = <&L2_400>;
			L2_400: l2-cache {
				compatible = "cache";
@@ -162,6 +167,7 @@
			compatible = "qcom,kryo385";
			reg = <0x0 0x500>;
			enable-method = "psci";
			qcom,freq-domain = <&cpufreq_hw 1>;
			next-level-cache = <&L2_500>;
			L2_500: l2-cache {
				compatible = "cache";
@@ -174,6 +180,7 @@
			compatible = "qcom,kryo385";
			reg = <0x0 0x600>;
			enable-method = "psci";
			qcom,freq-domain = <&cpufreq_hw 1>;
			next-level-cache = <&L2_600>;
			L2_600: l2-cache {
				compatible = "cache";
@@ -186,6 +193,7 @@
			compatible = "qcom,kryo385";
			reg = <0x0 0x700>;
			enable-method = "psci";
			qcom,freq-domain = <&cpufreq_hw 1>;
			next-level-cache = <&L2_700>;
			L2_700: l2-cache {
				compatible = "cache";
@@ -1836,6 +1844,17 @@
				status = "disabled";
			};
		};

		cpufreq_hw: cpufreq@17d43000 {
			compatible = "qcom,cpufreq-hw";
			reg = <0x17d43000 0x1400>, <0x17d45800 0x1400>;
			reg-names = "freq-domain0", "freq-domain1";

			clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>;
			clock-names = "xo", "alternate";

			#freq-domain-cells = <1>;
		};
	};

	thermal-zones {