Commit c5f12fdb authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'x86-apic-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip 

Pull x86 apic updates from Thomas Gleixner:

 - Cleanup the apic IPI implementation by removing duplicated code and
   consolidating the functions into the APIC core.

 - Implement a safe variant of the IPI broadcast mode. Contrary to
   earlier attempts this uses the core tracking of which CPUs have been
   brought online at least once so that a broadcast does not end up in
   some dead end in BIOS/SMM code when the CPU is still waiting for
   init. Once all CPUs have been brought up once, IPI broadcasting is
   enabled. Before that regular one by one IPIs are issued.

 - Drop the paravirt CR8 related functions as they have no user anymore

 - Initialize the APIC TPR to block interrupt 16-31 as they are reserved
   for CPU exceptions and should never be raised by any well behaving
   device.

 - Emit a warning when vector space exhaustion breaks the admin set
   affinity of an interrupt.

 - Make sure to use the NMI fallback when shutdown via reboot vector IPI
   fails. The original code had conditions which prevent the code path
   to be reached.

 - Annotate various APIC config variables as RO after init.

[ The ipi broadcase change came in earlier through the cpu hotplug
  branch, but I left the explanation in the commit message since it was
  shared between the two different branches    - Linus ]

* 'x86-apic-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (28 commits)
  x86/apic/vector: Warn when vector space exhaustion breaks affinity
  x86/apic: Annotate global config variables as "read-only after init"
  x86/apic/x2apic: Implement IPI shorthands support
  x86/apic/flat64: Remove the IPI shorthand decision logic
  x86/apic: Share common IPI helpers
  x86/apic: Remove the shorthand decision logic
  x86/smp: Enhance native_send_call_func_ipi()
  x86/smp: Move smp_function_call implementations into IPI code
  x86/apic: Provide and use helper for send_IPI_allbutself()
  x86/apic: Add static key to Control IPI shorthands
  x86/apic: Move no_ipi_broadcast() out of 32bit
  x86/apic: Add NMI_VECTOR wait to IPI shorthand
  x86/apic: Remove dest argument from __default_send_IPI_shortcut()
  x86/hotplug: Silence APIC and NMI when CPU is dead
  x86/cpu: Move arch_smt_update() to a neutral place
  x86/apic/uv: Make x2apic_extra_bits static
  x86/apic: Consolidate the apic local headers
  x86/apic: Move apic_flat_64 header into apic directory
  x86/apic: Move ipi header into apic directory
  x86/apic: Cleanup the include maze
  ...
parents a572ba63 743dac49

arch/x86/include/asm/apic.h

+5 −6
Original line number Diff line number Diff line
@@ -136,6 +136,7 @@ extern int lapic_get_maxlvt(void); 
extern void clear_local_APIC(void);

extern void disconnect_bsp_APIC(int virt_wire_setup);

extern void disable_local_APIC(void);

extern void apic_soft_disable(void);

extern void lapic_shutdown(void);

extern void sync_Arb_IDs(void);

extern void init_bsp_APIC(void);
@@ -176,6 +177,8 @@ extern void lapic_online(void); 
extern void lapic_offline(void);

extern bool apic_needs_pit(void);



extern void apic_send_IPI_allbutself(unsigned int vector);



#else /* !CONFIG_X86_LOCAL_APIC */

static inline void lapic_shutdown(void) { }

#define local_apic_timer_c2_ok		1
@@ -465,12 +468,6 @@ static inline unsigned default_get_apic_id(unsigned long x) 
#define TRAMPOLINE_PHYS_LOW		0x467

#define TRAMPOLINE_PHYS_HIGH		0x469



#ifdef CONFIG_X86_64

extern void apic_send_IPI_self(int vector);



DECLARE_PER_CPU(int, x2apic_extra_bits);

#endif



extern void generic_bigsmp_probe(void);



#ifdef CONFIG_X86_LOCAL_APIC
@@ -506,8 +503,10 @@ extern int default_check_phys_apicid_present(int phys_apicid); 


#ifdef CONFIG_SMP

bool apic_id_is_primary_thread(unsigned int id);

void apic_smt_update(void);

#else

static inline bool apic_id_is_primary_thread(unsigned int id) { return false; }

static inline void apic_smt_update(void) { }

#endif



extern void irq_enter(void);

arch/x86/include/asm/apic_flat_64.h

deleted100644 → 0
+0 −8
Original line number Diff line number Diff line 
/* SPDX-License-Identifier: GPL-2.0 */

#ifndef _ASM_X86_APIC_FLAT_64_H

#define _ASM_X86_APIC_FLAT_64_H



extern void flat_init_apic_ldr(void);



#endif

arch/x86/include/asm/bugs.h

+2 −0
Original line number Diff line number Diff line
@@ -18,4 +18,6 @@ int ppro_with_ram_bug(void); 
static inline int ppro_with_ram_bug(void) { return 0; }

#endif



extern void cpu_bugs_smt_update(void);



#endif /* _ASM_X86_BUGS_H */

arch/x86/include/asm/ipi.h

deleted100644 → 0
+0 −109
Original line number Diff line number Diff line 
/* SPDX-License-Identifier: GPL-2.0-only */

#ifndef _ASM_X86_IPI_H

#define _ASM_X86_IPI_H



#ifdef CONFIG_X86_LOCAL_APIC



/*

 * Copyright 2004 James Cleverdon, IBM.

 *

 * Generic APIC InterProcessor Interrupt code.

 *

 * Moved to include file by James Cleverdon from

 * arch/x86-64/kernel/smp.c

 *

 * Copyrights from kernel/smp.c:

 *

 * (c) 1995 Alan Cox, Building #3 <alan@redhat.com>

 * (c) 1998-99, 2000 Ingo Molnar <mingo@redhat.com>

 * (c) 2002,2003 Andi Kleen, SuSE Labs.

 */



#include <asm/hw_irq.h>

#include <asm/apic.h>

#include <asm/smp.h>



/*

 * the following functions deal with sending IPIs between CPUs.

 *

 * We use 'broadcast', CPU->CPU IPIs and self-IPIs too.

 */



static inline unsigned int __prepare_ICR(unsigned int shortcut, int vector,

					 unsigned int dest)

{

	unsigned int icr = shortcut | dest;



	switch (vector) {

	default:

		icr |= APIC_DM_FIXED | vector;

		break;

	case NMI_VECTOR:

		icr |= APIC_DM_NMI;

		break;

	}

	return icr;

}



static inline int __prepare_ICR2(unsigned int mask)

{

	return SET_APIC_DEST_FIELD(mask);

}



static inline void __xapic_wait_icr_idle(void)

{

	while (native_apic_mem_read(APIC_ICR) & APIC_ICR_BUSY)

		cpu_relax();

}



void __default_send_IPI_shortcut(unsigned int shortcut, int vector, unsigned int dest);



/*

 * This is used to send an IPI with no shorthand notation (the destination is

 * specified in bits 56 to 63 of the ICR).

 */

void __default_send_IPI_dest_field(unsigned int mask, int vector, unsigned int dest);



extern void default_send_IPI_single(int cpu, int vector);

extern void default_send_IPI_single_phys(int cpu, int vector);

extern void default_send_IPI_mask_sequence_phys(const struct cpumask *mask,

						 int vector);

extern void default_send_IPI_mask_allbutself_phys(const struct cpumask *mask,

							 int vector);



/* Avoid include hell */

#define NMI_VECTOR 0x02



extern int no_broadcast;



static inline void __default_local_send_IPI_allbutself(int vector)

{

	if (no_broadcast || vector == NMI_VECTOR)

		apic->send_IPI_mask_allbutself(cpu_online_mask, vector);

	else

		__default_send_IPI_shortcut(APIC_DEST_ALLBUT, vector, apic->dest_logical);

}



static inline void __default_local_send_IPI_all(int vector)

{

	if (no_broadcast || vector == NMI_VECTOR)

		apic->send_IPI_mask(cpu_online_mask, vector);

	else

		__default_send_IPI_shortcut(APIC_DEST_ALLINC, vector, apic->dest_logical);

}



#ifdef CONFIG_X86_32

extern void default_send_IPI_mask_sequence_logical(const struct cpumask *mask,

							 int vector);

extern void default_send_IPI_mask_allbutself_logical(const struct cpumask *mask,

							 int vector);

extern void default_send_IPI_mask_logical(const struct cpumask *mask,

						 int vector);

extern void default_send_IPI_allbutself(int vector);

extern void default_send_IPI_all(int vector);

extern void default_send_IPI_self(int vector);

#endif



#endif



#endif /* _ASM_X86_IPI_H */

arch/x86/include/asm/paravirt.h

+0 −12
Original line number Diff line number Diff line
@@ -139,18 +139,6 @@ static inline void __write_cr4(unsigned long x) 
	PVOP_VCALL1(cpu.write_cr4, x);

}



#ifdef CONFIG_X86_64

static inline unsigned long read_cr8(void)

{

	return PVOP_CALL0(unsigned long, cpu.read_cr8);

}



static inline void write_cr8(unsigned long x)

{

	PVOP_VCALL1(cpu.write_cr8, x);

}

#endif



static inline void arch_safe_halt(void)

{

	PVOP_VCALL0(irq.safe_halt);

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