Commit c5c7fb8f authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branches 'x86-cpu-for-linus', 'x86-boot-for-linus',... 

Merge branches 'x86-cpu-for-linus', 'x86-boot-for-linus', 'x86-cpufeature-for-linus', 'x86-process-for-linus' and 'x86-uv-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull trivial x86 branches from Ingo Molnar: small one-liners to fix up
details.

* 'x86-cpu-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86: Remove some noise from boot log when starting cpus

* 'x86-boot-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86, boot: Fix port argument to inl() function

* 'x86-cpufeature-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86, cpufeature: Add CPU features from Intel document 319433-012A

* 'x86-process-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86_64: Record stack pointer before task execution begins

* 'x86-uv-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86/UV: Lower UV rtc clocksource rating
parents 1b674bf1 140f190b 35f1790e 513c4ec6 42dfc43e b0deca2e

arch/x86/boot/boot.h

+1 −1
Original line number Diff line number Diff line
@@ -67,7 +67,7 @@ static inline void outl(u32 v, u16 port) 
{

	asm volatile("outl %0,%1" : : "a" (v), "dN" (port));

}

static inline u32 inl(u32 port)

static inline u32 inl(u16 port)

{

	u32 v;

	asm volatile("inl %1,%0" : "=a" (v) : "dN" (port));

arch/x86/include/asm/cpufeature.h

+3 −0
Original line number Diff line number Diff line
@@ -200,10 +200,13 @@ 
/* Intel-defined CPU features, CPUID level 0x00000007:0 (ebx), word 9 */

#define X86_FEATURE_FSGSBASE	(9*32+ 0) /* {RD/WR}{FS/GS}BASE instructions*/

#define X86_FEATURE_BMI1	(9*32+ 3) /* 1st group bit manipulation extensions */

#define X86_FEATURE_HLE		(9*32+ 4) /* Hardware Lock Elision */

#define X86_FEATURE_AVX2	(9*32+ 5) /* AVX2 instructions */

#define X86_FEATURE_SMEP	(9*32+ 7) /* Supervisor Mode Execution Protection */

#define X86_FEATURE_BMI2	(9*32+ 8) /* 2nd group bit manipulation extensions */

#define X86_FEATURE_ERMS	(9*32+ 9) /* Enhanced REP MOVSB/STOSB */

#define X86_FEATURE_INVPCID	(9*32+10) /* Invalidate Processor Context ID */

#define X86_FEATURE_RTM		(9*32+11) /* Restricted Transactional Memory */



#if defined(__KERNEL__) && !defined(__ASSEMBLY__)

arch/x86/kernel/process_64.c

+1 −0
Original line number Diff line number Diff line
@@ -340,6 +340,7 @@ start_thread_common(struct pt_regs *regs, unsigned long new_ip, 
	loadsegment(es, _ds);

	loadsegment(ds, _ds);

	load_gs_index(0);

	current->thread.usersp	= new_sp;

	regs->ip		= new_ip;

	regs->sp		= new_sp;

	percpu_write(old_rsp, new_sp);

arch/x86/kernel/smpboot.c

+0 −2
Original line number Diff line number Diff line
@@ -727,8 +727,6 @@ do_rest: 
	 * the targeted processor.

	 */



	printk(KERN_DEBUG "smpboot cpu %d: start_ip = %lx\n", cpu, start_ip);



	atomic_set(&init_deasserted, 0);



	if (get_uv_system_type() != UV_NON_UNIQUE_APIC) {

arch/x86/platform/uv/uv_time.c

+1 −5
Original line number Diff line number Diff line
@@ -37,7 +37,7 @@ static void uv_rtc_timer_setup(enum clock_event_mode, 


static struct clocksource clocksource_uv = {

	.name		= RTC_NAME,

	.rating		= 400,

	.rating		= 299,

	.read		= uv_read_rtc,

	.mask		= (cycle_t)UVH_RTC_REAL_TIME_CLOCK_MASK,

	.flags		= CLOCK_SOURCE_IS_CONTINUOUS,
@@ -379,10 +379,6 @@ static __init int uv_rtc_setup_clock(void) 
	if (!is_uv_system())

		return -ENODEV;



	/* If single blade, prefer tsc */

	if (uv_num_possible_blades() == 1)

		clocksource_uv.rating = 250;



	rc = clocksource_register_hz(&clocksource_uv, sn_rtc_cycles_per_second);

	if (rc)

		printk(KERN_INFO "UV RTC clocksource failed rc %d\n", rc);

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