x86, ioapic: Split up setup_ioapic_entry() (c5b4712c) · Commits · 戴 / test

arch/x86/kernel/apic/io_apic.c

+80 −59

Original line number	Diff line number	Diff line
		@@ -1255,29 +1255,27 @@ static void ioapic_register_intr(unsigned int irq, struct irq_cfg *cfg,
		fasteoi ? "fasteoi" : "edge");
		}

		static int setup_ioapic_entry(int apic_id, int irq,
		struct IO_APIC_route_entry *entry,
		unsigned int destination, int trigger,
		int polarity, int vector, int pin)
		{
		/*
		* add it to the IO-APIC irq-routing table:
		*/
		memset(entry,0,sizeof(*entry));

		if (intr_remapping_enabled) {
		struct intel_iommu *iommu = map_ioapic_to_ir(apic_id);
		struct irte irte;
		struct IR_IO_APIC_route_entry *ir_entry =
		(struct IR_IO_APIC_route_entry *) entry;
		static int setup_ir_ioapic_entry(int irq,
		struct IR_IO_APIC_route_entry *entry,
		unsigned int destination, int vector,
		struct io_apic_irq_attr *attr)
		{
		int index;
		struct irte irte;
		int apic_id = mpc_ioapic_id(attr->ioapic);
		struct intel_iommu *iommu = map_ioapic_to_ir(apic_id);

		if (!iommu)
		panic("No mapping iommu for ioapic %d\n", apic_id);
		if (!iommu) {
		pr_warn("No mapping iommu for ioapic %d\n", apic_id);
		return -ENODEV;
		}

		index = alloc_irte(iommu, irq, 1);
		if (index < 0)
		panic("Failed to allocate IRTE for ioapic %d\n", apic_id);
		if (index < 0) {
		pr_warn("Failed to allocate IRTE for ioapic %d\n", apic_id);
		return -ENOMEM;
		}

		prepare_irte(&irte, vector, destination);

		@@ -1286,16 +1284,6 @@ static int setup_ioapic_entry(int apic_id, int irq,

		modify_irte(irq, &irte);

		ir_entry->index2 = (index >> 15) & 0x1;
		ir_entry->zero = 0;
		ir_entry->format = 1;
		ir_entry->index = (index & 0x7fff);
		/*
		* IO-APIC RTE will be configured with virtual vector.
		* irq handler will do the explicit EOI to the io-apic.
		*/
		ir_entry->vector = pin;

		apic_printk(APIC_VERBOSE, KERN_DEBUG "IOAPIC[%d]: "
		"Set IRTE entry (P:%d FPD:%d Dst_Mode:%d "
		"Redir_hint:%d Trig_Mode:%d Dlvry_Mode:%X "
		@@ -1305,22 +1293,57 @@ static int setup_ioapic_entry(int apic_id, int irq,
		irte.redir_hint, irte.trigger_mode, irte.dlvry_mode,
		irte.avail, irte.vector, irte.dest_id,
		irte.sid, irte.sq, irte.svt);
		} else {

		memset(entry, 0, sizeof(*entry));

		entry->index2 = (index >> 15) & 0x1;
		entry->zero = 0;
		entry->format = 1;
		entry->index = (index & 0x7fff);
		/*
		* IO-APIC RTE will be configured with virtual vector.
		* irq handler will do the explicit EOI to the io-apic.
		*/
		entry->vector = attr->ioapic_pin;
		entry->mask = 0; /* enable IRQ */
		entry->trigger = attr->trigger;
		entry->polarity = attr->polarity;

		/* Mask level triggered irqs.
		* Use IRQ_DELAYED_DISABLE for edge triggered irqs.
		*/
		if (attr->trigger)
		entry->mask = 1;

		return 0;
		}

		static int setup_ioapic_entry(int irq, struct IO_APIC_route_entry *entry,
		unsigned int destination, int vector,
		struct io_apic_irq_attr *attr)
		{
		if (intr_remapping_enabled)
		return setup_ir_ioapic_entry(irq,
		(struct IR_IO_APIC_route_entry *)entry,
		destination, vector, attr);

		memset(entry, 0, sizeof(*entry));

		entry->delivery_mode = apic->irq_delivery_mode;
		entry->dest_mode = apic->irq_dest_mode;
		entry->dest = destination;
		entry->vector = vector;
		}

		entry->mask = 0; /* enable IRQ */
		entry->trigger = trigger;
		entry->polarity = polarity;
		entry->trigger = attr->trigger;
		entry->polarity = attr->polarity;

		/* Mask level triggered irqs.
		/*
		* Mask level triggered irqs.
		* Use IRQ_DELAYED_DISABLE for edge triggered irqs.
		*/
		if (trigger)
		if (attr->trigger)
		entry->mask = 1;

		return 0;
		}

		@@ -1351,13 +1374,11 @@ static void setup_ioapic_irq(unsigned int irq, struct irq_cfg *cfg,
		attr->ioapic, mpc_ioapic_id(attr->ioapic), attr->ioapic_pin,
		cfg->vector, irq, attr->trigger, attr->polarity, dest);


		if (setup_ioapic_entry(mpc_ioapic_id(attr->ioapic), irq, &entry,
		dest, attr->trigger, attr->polarity, cfg->vector,
		attr->ioapic_pin)) {
		printk("Failed to setup ioapic entry for ioapic %d, pin %d\n",
		if (setup_ioapic_entry(irq, &entry, dest, cfg->vector, attr)) {
		pr_warn("Failed to setup ioapic entry for ioapic %d, pin %d\n",
		mpc_ioapic_id(attr->ioapic), attr->ioapic_pin);
		__clear_irq_vector(irq, cfg);

		return;
		}

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