Commit c5792d77 authored by Rex Zhu's avatar Rex Zhu Committed by Alex Deucher
Browse files

drm/amd/pp: Remove SAMU support in powerplay 



As the SAMU ip was not supported in linux,
so delete the SAMU support in powerplay on
asics Bonarire/Hawwii/Tonga/Fiji/Polaris/vegam.

Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarRex Zhu <Rex.Zhu@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent dc85db25

drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c

+0 −54
Original line number Diff line number Diff line
@@ -39,13 +39,6 @@ static int smu7_enable_disable_vce_dpm(struct pp_hwmgr *hwmgr, bool enable) 
			PPSMC_MSG_VCEDPM_Disable);

}



static int smu7_enable_disable_samu_dpm(struct pp_hwmgr *hwmgr, bool enable)

{

	return smum_send_msg_to_smc(hwmgr, enable ?

			PPSMC_MSG_SAMUDPM_Enable :

			PPSMC_MSG_SAMUDPM_Disable);

}



static int smu7_update_uvd_dpm(struct pp_hwmgr *hwmgr, bool bgate)

{

	if (!bgate)
@@ -60,13 +53,6 @@ static int smu7_update_vce_dpm(struct pp_hwmgr *hwmgr, bool bgate) 
	return smu7_enable_disable_vce_dpm(hwmgr, !bgate);

}



static int smu7_update_samu_dpm(struct pp_hwmgr *hwmgr, bool bgate)

{

	if (!bgate)

		smum_update_smc_table(hwmgr, SMU_SAMU_TABLE);

	return smu7_enable_disable_samu_dpm(hwmgr, !bgate);

}



int smu7_powerdown_uvd(struct pp_hwmgr *hwmgr)

{

	if (phm_cf_want_uvd_power_gating(hwmgr))
@@ -107,35 +93,15 @@ static int smu7_powerup_vce(struct pp_hwmgr *hwmgr) 
	return 0;

}



static int smu7_powerdown_samu(struct pp_hwmgr *hwmgr)

{

	if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,

			PHM_PlatformCaps_SamuPowerGating))

		return smum_send_msg_to_smc(hwmgr,

				PPSMC_MSG_SAMPowerOFF);

	return 0;

}



static int smu7_powerup_samu(struct pp_hwmgr *hwmgr)

{

	if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,

			PHM_PlatformCaps_SamuPowerGating))

		return smum_send_msg_to_smc(hwmgr,

				PPSMC_MSG_SAMPowerON);

	return 0;

}



int smu7_disable_clock_power_gating(struct pp_hwmgr *hwmgr)

{

	struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);



	data->uvd_power_gated = false;

	data->vce_power_gated = false;

	data->samu_power_gated = false;



	smu7_powerup_uvd(hwmgr);

	smu7_powerup_vce(hwmgr);

	smu7_powerup_samu(hwmgr);



	return 0;

}
@@ -195,26 +161,6 @@ void smu7_powergate_vce(struct pp_hwmgr *hwmgr, bool bgate) 
	}

}



int smu7_powergate_samu(struct pp_hwmgr *hwmgr, bool bgate)

{

	struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);



	if (data->samu_power_gated == bgate)

		return 0;



	data->samu_power_gated = bgate;



	if (bgate) {

		smu7_update_samu_dpm(hwmgr, true);

		smu7_powerdown_samu(hwmgr);

	} else {

		smu7_powerup_samu(hwmgr);

		smu7_update_samu_dpm(hwmgr, false);

	}



	return 0;

}



int smu7_update_clock_gatings(struct pp_hwmgr *hwmgr,

					const uint32_t *msg_id)

{

drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.h

+0 −1
Original line number Diff line number Diff line
@@ -29,7 +29,6 @@ 
void smu7_powergate_vce(struct pp_hwmgr *hwmgr, bool bgate);

void smu7_powergate_uvd(struct pp_hwmgr *hwmgr, bool bgate);

int smu7_powerdown_uvd(struct pp_hwmgr *hwmgr);

int smu7_powergate_samu(struct pp_hwmgr *hwmgr, bool bgate);

int smu7_powergate_acp(struct pp_hwmgr *hwmgr, bool bgate);

int smu7_disable_clock_power_gating(struct pp_hwmgr *hwmgr);

int smu7_update_clock_gatings(struct pp_hwmgr *hwmgr,

drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

+0 −1
Original line number Diff line number Diff line
@@ -4300,7 +4300,6 @@ static int smu7_init_power_gate_state(struct pp_hwmgr *hwmgr) 


	data->uvd_power_gated = false;

	data->vce_power_gated = false;

	data->samu_power_gated = false;



	return 0;

}

drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.h

+0 −1
Original line number Diff line number Diff line
@@ -310,7 +310,6 @@ struct smu7_hwmgr { 
	/* ---- Power Gating States ---- */

	bool                           uvd_power_gated;

	bool                           vce_power_gated;

	bool                           samu_power_gated;

	bool                           need_long_memory_training;



	/* Application power optimization parameters */

drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.h

+0 −1
Original line number Diff line number Diff line
@@ -370,7 +370,6 @@ struct vega10_hwmgr { 
	/* ---- Power Gating States ---- */

	bool                           uvd_power_gated;

	bool                           vce_power_gated;

	bool                           samu_power_gated;

	bool                           need_long_memory_training;



	/* Internal settings to apply the application power optimization parameters */

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