dt-bindings: host1x: Document new interconnect properties

- reset-names: Must include the following entries:

  - host1x

Each host1x client module having to perform DMA through the Memory Controller

should have the interconnect endpoints set to the Memory Client and External

Memory respectively.

The host1x top-level node defines a number of children, each representing one

of the following host1x client modules:

  - reset-names: Must include the following entries:

    - mpe

  Optional properties:

  - interconnects: Must contain entry for the MPE memory clients.

  - interconnect-names: Must include name of the interconnect path for each

    interconnect entry. Consult TRM documentation for information about

    available memory clients, see MEMORY CONTROLLER section.

- vi: video input

  Required properties:

	  Required properties:

	  - remote-endpoint: phandle to vi port 'endpoint' node.

  Optional properties:

  - interconnects: Must contain entry for the VI memory clients.

  - interconnect-names: Must include name of the interconnect path for each

    interconnect entry. Consult TRM documentation for information about

    available memory clients, see MEMORY CONTROLLER section.

- epp: encoder pre-processor

  Required properties:

  - reset-names: Must include the following entries:

    - epp

  Optional properties:

  - interconnects: Must contain entry for the EPP memory clients.

  - interconnect-names: Must include name of the interconnect path for each

    interconnect entry. Consult TRM documentation for information about

    available memory clients, see MEMORY CONTROLLER section.

- isp: image signal processor

  Required properties:

  - reset-names: Must include the following entries:

    - isp

  Optional properties:

  - interconnects: Must contain entry for the ISP memory clients.

  - interconnect-names: Must include name of the interconnect path for each

    interconnect entry. Consult TRM documentation for information about

    available memory clients, see MEMORY CONTROLLER section.

- gr2d: 2D graphics engine

  Required properties:

  - reset-names: Must include the following entries:

    - 2d

  Optional properties:

  - interconnects: Must contain entry for the GR2D memory clients.

  - interconnect-names: Must include name of the interconnect path for each

    interconnect entry. Consult TRM documentation for information about

    available memory clients, see MEMORY CONTROLLER section.

- gr3d: 3D graphics engine

  Required properties:

    - 3d

    - 3d2 (Only required on SoCs with two 3D clocks)

  Optional properties:

  - interconnects: Must contain entry for the GR3D memory clients.

  - interconnect-names: Must include name of the interconnect path for each

    interconnect entry. Consult TRM documentation for information about

    available memory clients, see MEMORY CONTROLLER section.

- dc: display controller

  Required properties:

  - nvidia,hpd-gpio: specifies a GPIO used for hotplug detection

  - nvidia,edid: supplies a binary EDID blob

  - nvidia,panel: phandle of a display panel

  - interconnects: Must contain entry for the DC memory clients.

  - interconnect-names: Must include name of the interconnect path for each

    interconnect entry. Consult TRM documentation for information about

    available memory clients, see MEMORY CONTROLLER section.

- hdmi: High Definition Multimedia Interface

  - reset-names: Must include the following entries:

    - vic

  Optional properties:

  - interconnects: Must contain entry for the VIC memory clients.

  - interconnect-names: Must include name of the interconnect path for each

    interconnect entry. Consult TRM documentation for information about

    available memory clients, see MEMORY CONTROLLER section.

Example:

/ {

			resets = <&tegra_car 27>;

			reset-names = "dc";

			interconnects = <&mc TEGRA20_MC_DISPLAY0A &emc>,

					<&mc TEGRA20_MC_DISPLAY0B &emc>,

					<&mc TEGRA20_MC_DISPLAY0C &emc>,

					<&mc TEGRA20_MC_DISPLAYHC &emc>;

			interconnect-names = "wina",

					     "winb",

					     "winc",

					     "cursor";

			rgb {

				status = "disabled";

			};

			resets = <&tegra_car 26>;

			reset-names = "dc";

			interconnects = <&mc TEGRA20_MC_DISPLAY0AB &emc>,

					<&mc TEGRA20_MC_DISPLAY0BB &emc>,

					<&mc TEGRA20_MC_DISPLAY0CB &emc>,

					<&mc TEGRA20_MC_DISPLAYHCB &emc>;

			interconnect-names = "wina",

					     "winb",

					     "winc",

					     "cursor";

			rgb {

				status = "disabled";

			};