Commit c52e7ebc authored Jul 11, 2019 by Jonathan Kim Committed by Alex Deucher Jul 18, 2019

drm/amdgpu: exposing fica registers to df offsets



exposing fica registers to poll df pie data for xgmi error counters for
vega20.

Signed-off-by: Jonathan Kim <Jonathan.Kim@amd.com>
Reviewed-by: Alexander Deucher <Alexander.Deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

parent c0640304

drivers/gpu/drm/amd/include/asic_reg/df/df_3_6_offset.h

+4 −0

Original line number	Diff line number	Diff line
		@@ -48,4 +48,8 @@
		#define smnPerfMonCtrLo3 0x01d478UL
		#define smnPerfMonCtrHi3 0x01d47cUL

		#define smnDF_PIE_AON_FabricIndirectConfigAccessAddress3 0x1d05cUL
		#define smnDF_PIE_AON_FabricIndirectConfigAccessDataLo3 0x1d098UL
		#define smnDF_PIE_AON_FabricIndirectConfigAccessDataHi3 0x1d09cUL

		#endif

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