Commit c512110d authored by Biju Das's avatar Biju Das Committed by Simon Horman
Browse files

arm64: dts: renesas: r8a774a1: Add all MSIOF nodes 



Add the device nodes for all MSIOF SPI controllers on RZ/G2M SoC.

Based on several similar patches of the R8A7796 device tree
by Geert Uytterhoeven <geert+renesas@glider.be>
and Simon Horman <horms+renesas@verge.net.au>.

Signed-off-by: default avatarBiju Das <biju.das@bp.renesas.com>
Reviewed-by: default avatarFabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
parent 8f507bab

arch/arm64/boot/dts/renesas/r8a774a1.dtsi

+62 −0
Original line number Diff line number Diff line
@@ -857,6 +857,68 @@ 
			status = "disabled";

		};



		msiof0: spi@e6e90000 {

			compatible = "renesas,msiof-r8a774a1",

				     "renesas,rcar-gen3-msiof";

			reg = <0 0xe6e90000 0 0x0064>;

			interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 211>;

			dmas = <&dmac1 0x41>, <&dmac1 0x40>,

			       <&dmac2 0x41>, <&dmac2 0x40>;

			dma-names = "tx", "rx", "tx", "rx";

			power-domains = <&sysc 32>;

			resets = <&cpg 211>;

			#address-cells = <1>;

			#size-cells = <0>;

			status = "disabled";

		};



		msiof1: spi@e6ea0000 {

			compatible = "renesas,msiof-r8a774a1",

				     "renesas,rcar-gen3-msiof";

			reg = <0 0xe6ea0000 0 0x0064>;

			interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 210>;

			dmas = <&dmac1 0x43>, <&dmac1 0x42>,

			       <&dmac2 0x43>, <&dmac2 0x42>;

			dma-names = "tx", "rx", "tx", "rx";

			power-domains = <&sysc 32>;

			resets = <&cpg 210>;

			#address-cells = <1>;

			#size-cells = <0>;

			status = "disabled";

		};



		msiof2: spi@e6c00000 {

			compatible = "renesas,msiof-r8a774a1",

				     "renesas,rcar-gen3-msiof";

			reg = <0 0xe6c00000 0 0x0064>;

			interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 209>;

			dmas = <&dmac0 0x45>, <&dmac0 0x44>;

			dma-names = "tx", "rx";

			power-domains = <&sysc 32>;

			resets = <&cpg 209>;

			#address-cells = <1>;

			#size-cells = <0>;

			status = "disabled";

		};



		msiof3: spi@e6c10000 {

			compatible = "renesas,msiof-r8a774a1",

				     "renesas,rcar-gen3-msiof";

			reg = <0 0xe6c10000 0 0x0064>;

			interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 208>;

			dmas = <&dmac0 0x47>, <&dmac0 0x46>;

			dma-names = "tx", "rx";

			power-domains = <&sysc 32>;

			resets = <&cpg 208>;

			#address-cells = <1>;

			#size-cells = <0>;

			status = "disabled";

		};



		sdhi0: sd@ee100000 {

			compatible = "renesas,sdhi-r8a774a1",

				     "renesas,rcar-gen3-sdhi";

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