Commit c4f55198 authored by Jim Mattson's avatar Jim Mattson Committed by Paolo Bonzini
Browse files

kvm: x86: Introduce KVM_CAP_EXCEPTION_PAYLOAD 



This is a per-VM capability which can be enabled by userspace so that
the faulting linear address will be included with the information
about a pending #PF in L2, and the "new DR6 bits" will be included
with the information about a pending #DB in L2. With this capability
enabled, the L1 hypervisor can now intercept #PF before CR2 is
modified. Under VMX, the L1 hypervisor can now intercept #DB before
DR6 and DR7 are modified.

When userspace has enabled KVM_CAP_EXCEPTION_PAYLOAD, it should
generally provide an appropriate payload when injecting a #PF or #DB
exception via KVM_SET_VCPU_EVENTS. However, to support restoring old
checkpoints, this payload is not required.

Note that bit 16 of the "new DR6 bits" is set to indicate that a debug
exception (#DB) or a breakpoint exception (#BP) occurred inside an RTM
region while advanced debugging of RTM transactional regions was
enabled. This is the reverse of DR6.RTM, which is cleared in this
scenario.

This capability also enables exception.pending in struct
kvm_vcpu_events, which allows userspace to distinguish between pending
and injected exceptions.

Reported-by: default avatarJim Mattson <jmattson@google.com>
Suggested-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
Signed-off-by: default avatarJim Mattson <jmattson@google.com>
Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
parent f10c729f

Documentation/virtual/kvm/api.txt

+26 −1
Original line number Diff line number Diff line
@@ -4568,7 +4568,7 @@ hpage module parameter is not set to 1, -EINVAL is returned. 
While it is generally possible to create a huge page backed VM without

this capability, the VM will not be able to run.



7.14 KVM_CAP_MSR_PLATFORM_INFO

7.15 KVM_CAP_MSR_PLATFORM_INFO



Architectures: x86

Parameters: args[0] whether feature should be enabled or not
@@ -4591,6 +4591,31 @@ state). Enabling this capability on a VM depends on the CPU having 
the necessary functionality and on the facility being enabled with a

kvm-hv module parameter.



7.17 KVM_CAP_EXCEPTION_PAYLOAD



Architectures: x86

Parameters: args[0] whether feature should be enabled or not



With this capability enabled, CR2 will not be modified prior to the

emulated VM-exit when L1 intercepts a #PF exception that occurs in

L2. Similarly, for kvm-intel only, DR6 will not be modified prior to

the emulated VM-exit when L1 intercepts a #DB exception that occurs in

L2. As a result, when KVM_GET_VCPU_EVENTS reports a pending #PF (or

#DB) exception for L2, exception.has_payload will be set and the

faulting address (or the new DR6 bits*) will be reported in the

exception_payload field. Similarly, when userspace injects a #PF (or

#DB) into L2 using KVM_SET_VCPU_EVENTS, it is expected to set

exception.has_payload and to put the faulting address (or the new DR6

bits*) in the exception_payload field.



This capability also enables exception.pending in struct

kvm_vcpu_events, which allows userspace to distinguish between pending

and injected exceptions.





* For the new DR6 bits, note that bit 16 is set iff the #DB exception

  will clear DR6.RTM.



8. Other capabilities.

----------------------

arch/x86/kvm/x86.c

+5 −0
Original line number Diff line number Diff line
@@ -3015,6 +3015,7 @@ int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext) 
	case KVM_CAP_IMMEDIATE_EXIT:

	case KVM_CAP_GET_MSR_FEATURES:

	case KVM_CAP_MSR_PLATFORM_INFO:

	case KVM_CAP_EXCEPTION_PAYLOAD:

		r = 1;

		break;

	case KVM_CAP_SYNC_REGS:
@@ -4500,6 +4501,10 @@ split_irqchip_unlock: 
		kvm->arch.guest_can_read_msr_platform_info = cap->args[0];

		r = 0;

		break;

	case KVM_CAP_EXCEPTION_PAYLOAD:

		kvm->arch.exception_payload_enabled = cap->args[0];

		r = 0;

		break;

	default:

		r = -EINVAL;

		break;

include/uapi/linux/kvm.h

+1 −0
Original line number Diff line number Diff line
@@ -964,6 +964,7 @@ struct kvm_ppc_resize_hpt { 
#define KVM_CAP_HYPERV_SEND_IPI 161

#define KVM_CAP_COALESCED_PIO 162

#define KVM_CAP_HYPERV_ENLIGHTENED_VMCS 163

#define KVM_CAP_EXCEPTION_PAYLOAD 164



#ifdef KVM_CAP_IRQ_ROUTING

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