arm64: dts: renesas: r8a774a1: Add DU device to DT (c4f223b4) · Commits · 戴 / test

arch/arm64/boot/dts/renesas/r8a774a1.dtsi

+63 −0

Original line number	Diff line number	Diff line
		@@ -2043,6 +2043,69 @@
		};
		};

		du: display@feb00000 {
		compatible = "renesas,du-r8a774a1";
		reg = <0 0xfeb00000 0 0x70000>;
		interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
		<GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
		<GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&cpg CPG_MOD 724>,
		<&cpg CPG_MOD 723>,
		<&cpg CPG_MOD 722>;
		clock-names = "du.0", "du.1", "du.2";
		status = "disabled";

		vsps = <&vspd0 &vspd1 &vspd2>;

		ports {
		#address-cells = <1>;
		#size-cells = <0>;

		port@0 {
		reg = <0>;
		du_out_rgb: endpoint {
		};
		};
		port@1 {
		reg = <1>;
		du_out_hdmi0: endpoint {
		};
		};
		port@2 {
		reg = <2>;
		du_out_lvds0: endpoint {
		remote-endpoint = <&lvds0_in>;
		};
		};
		};
		};

		lvds0: lvds@feb90000 {
		compatible = "renesas,r8a774a1-lvds";
		reg = <0 0xfeb90000 0 0x14>;
		clocks = <&cpg CPG_MOD 727>;
		power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
		resets = <&cpg 727>;
		status = "disabled";

		ports {
		#address-cells = <1>;
		#size-cells = <0>;

		port@0 {
		reg = <0>;
		lvds0_in: endpoint {
		remote-endpoint = <&du_out_lvds0>;
		};
		};
		port@1 {
		reg = <1>;
		lvds0_out: endpoint {
		};
		};
		};
		};

		prr: chipid@fff00044 {
		compatible = "renesas,prr";
		reg = <0 0xfff00044 0 4>;